Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2008-05-23
2010-06-15
Chambliss, Alonzo (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S738000, C257S777000, C257S780000, C257SE23021, C257SE21598, C361S790000, C361S792000, C361S807000, C438S109000
Reexamination Certificate
active
07737552
ABSTRACT:
A device and a method for bonding elements are described. A first solder ball is produced on a main surface of a first element. A second solder ball is produced on a main surface of a second element. Contact is provided between the first solder ball and the second solder ball. The first and second elements are bonded by applying a reflow act whereby the solder balls melt and form a joined solder ball structure. Prior to the bonding, the first solder ball is laterally embedded in a first layer of non-conductive material and the second solder ball is laterally embedded in a second layer of non-conductive material, such that the upper part of the first solder ball and upper part of the second solder ball are not covered by the non-conductive material. A third solder volume is applied on one or both of the embedded first or second solder balls, prior to the bonding.
REFERENCES:
patent: 5186381 (1993-02-01), Kim
patent: 5598036 (1997-01-01), Ho
patent: 5641113 (1997-06-01), Somaki et al.
patent: 5844315 (1998-12-01), Melton et al.
patent: 6150724 (2000-11-01), Wenzel et al.
patent: 6168972 (2001-01-01), Wang et al.
patent: 6229158 (2001-05-01), Minemier et al.
patent: 6285562 (2001-09-01), Zakel et al.
patent: 6425516 (2002-07-01), Iwatsu et al.
patent: 6555917 (2003-04-01), Heo
patent: 6664637 (2003-12-01), Jimarez et al.
patent: 6787917 (2004-09-01), Lee et al.
patent: 6798057 (2004-09-01), Bolkin et al.
patent: 6894378 (2005-05-01), Winderl
patent: 6908784 (2005-06-01), Farnworth et al.
patent: 7122906 (2006-10-01), Doan
patent: 7205177 (2007-04-01), De Raedt et al.
patent: 7378297 (2008-05-01), Beyne
patent: 2002/0195703 (2002-12-01), Kameda
patent: 2003/0141105 (2003-07-01), Sugaya et al.
patent: 2004/0094842 (2004-05-01), Jimarez et al.
patent: 2005/0017336 (2005-01-01), Kung et al.
patent: 2009/0200651 (2009-08-01), Kung et al.
patent: 0 729 182 (1996-08-01), None
patent: 0 875 935 (1998-11-01), None
patent: 1 489 657 (2004-12-01), None
patent: 2004265888 (2004-09-01), None
patent: WO 99/04430 (1999-01-01), None
Keser et al., “Encapsulated Double-Bump WL-CSP: Design and Reliability,”2001 Electronic Components and Technology Conference.
Beyne, “3D Interconnection and Packaging: 3D-SIP, 3D-SOC or 3D-IC?,” IMEC, Belgium.
Chambliss Alonzo
IMEC
Knobbe Martens Olson & Bear LLP
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