Device for utilization with the synchronization of clock...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Reexamination Certificate

active

07471129

ABSTRACT:
A clock signal synchronization method and an apparatus device for utilization with the synchronization of clock signals is disclosed. In one embodiment the apparatus includes a delay device with a variably controllable delay time into which a clock signal, or a signal obtained therefrom, is input, charged with the variably controllable delay time, and output as a delayed clock signal. A device is provided for determining whether a clock edge of the delayed clock signal output by the delay device, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom.

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“A Pseudo Multi-Bank DRAM with Categorized Access Sequence”, Shinichiro Shiratake, et al., 1999 Symposium on VLSI Circuits Digest of Technical Papers, pp. 127-130.

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