Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2006-02-07
2006-02-07
Tran, Khai (Department: 2637)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
Reexamination Certificate
active
06996200
ABSTRACT:
A first device comprises a loop circuit to control a sample rate of a digital circuit element. A circuit comprises a digital loop circuit to control a sample rate of a digital circuit element to be a function of a frequency of a signal received by the circuit. A second device receives two or more sampled data streams having sample rates different from one another, converts the sample rate of one or more of the data streams to provide two or more data streams having sample rates compatible with one another, and combines the two data streams. Sample rate converter devices are used in a PLL and a clock recovery circuit.
REFERENCES:
patent: 5313205 (1994-05-01), Wilson et al.
patent: 5353026 (1994-10-01), Wilson et al.
patent: 5485152 (1996-01-01), Wilson et al.
patent: 5489903 (1996-02-01), Wilson et al.
patent: 5497152 (1996-03-01), Wilson et al.
patent: 5512897 (1996-04-01), Wilson et al.
patent: 5528240 (1996-06-01), Wilson et al.
patent: 5552785 (1996-09-01), Wilson et al.
patent: 5574454 (1996-11-01), Wilson et al.
patent: 5600320 (1997-02-01), Wilson et al.
patent: 5619720 (1997-04-01), Garde et al.
patent: 5621478 (1997-04-01), Demmer
patent: 5625358 (1997-04-01), Wilson et al.
patent: 5625359 (1997-04-01), Wilson et al.
patent: 5638010 (1997-06-01), Adams
patent: 5712635 (1998-01-01), Wilson et al.
patent: 5784378 (1998-07-01), Murray et al.
patent: 5786778 (1998-07-01), Adams et al.
patent: 5809432 (1998-09-01), Yamashita
patent: 5844629 (1998-12-01), Murray et al.
patent: 5892468 (1999-04-01), Wilson et al.
patent: 5894557 (1999-04-01), Bade et al.
patent: 5963160 (1999-10-01), Wilson et al.
patent: 5987484 (1999-11-01), Sherry et al.
patent: 6040793 (2000-03-01), Ferguson, Jr. et al.
patent: 6049302 (2000-04-01), Hinckley, Jr.
patent: 6163685 (2000-12-01), Dilling et al.
patent: 6393070 (2002-05-01), Reber
patent: 6487672 (2002-11-01), Byrne et al.
patent: 0 948 133 (1999-10-01), None
patent: WO 98/53634 (1998-11-01), None
Chang et al., “A CMOS Analog Front-End Circuit for an FDM-Based ADSL System”, IEEE Journal of Solid-State Circuits, vol. 30, (1995) Dec., No. 12, New York, U.S.A., pp. 1449-1455.
Prendergast Colm
Schubert Richard
Wilson James
Analog Devices Inc.
Tran Khai
Wolf Greenfield & Sacks P.C.
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