Device for the synchronization of digital data transmitted in pa

Details Device for the synchronization of digital data transmitted in pa Device for the synchronization of digital data transmitted in pa

1981-03-26

1983-06-28

Brigance, Gerald L.

Multiplex communications

Wide area network

Packet switching

370100, H04J 306

Patent

active

043909850

ABSTRACT:
The invention relates to a device for synchronizing, on reception, digital data transmitted by successive packets modulating different carrier frequencies. It comprises a signal channel comprising a delay line and a circuit for sampling by a synchronized signal at the rhythm f of the data received and a synchronization channel which comprises a logic comparison circuit with two flip-flops comparing the transitions of the data received with reference signals of the same rhythm f, but displaced in time. This circuit supplies the synchronized circuit at the end of the comparison phase. A memory register associated with a multiplexer makes it possible to select this synchronized signal for sampling the corresponding data packet. The time lag introduced by the delay line is equal to the duration of the sychronization phase.

REFERENCES:
patent: 4071706 (1978-01-01), Warren
patent: 4234952 (1980-11-01), Gable et al.
patent: 4317195 (1982-02-01), Barberis et al.

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