Device for the protection against breakdown of an N+ type diffus

Details Device for the protection against breakdown of an N+ type diffus Device for the protection against breakdown of an N+ type diffus

1990-10-30

1993-09-14

Larkins, William D.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including high voltage or high power devices isolated from...

257337, 257528, 257776, H01L 2706

Patent

active

052452115

ABSTRACT:
A device accomplishes protection against breakdown of an N+ type diffused region (6) inserted in a vertical-type semiconductor integrated power structure. Such a structure comprises N+ type substrate (1) over which there is superimposed an N- type epitaxial layer (2) in which a grounded P type insulation pocket (3) is obtained. The insulation pocket (3) contains an N type region (4) including a P type region (5) for the containment of the N+ type diffused region (6). The diffused region (6) is insulated electrically with respect to the P type containment region (5).

REFERENCES:
patent: 3999215 (1976-12-01), Aagaard
patent: 4521799 (1985-06-01), Davies
patent: 4903093 (1990-02-01), Ide et al.
patent: 4947231 (1990-08-01), Palara et al.
patent: 4969030 (1990-11-01), Musumori et al.
Hershman, IBM Tech Discl Bulletin, vol. 14, No. 4, Sep. 1971, p. 1207.
IBM Technical Disclosure Bulleton, vol. 19 No. 7 Dec. 1976, pp. 2598-2599 "N+ Multiple Underpass Device"; C. A. Price and J. W. Wolf.

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