Multiplex communications – Wide area network – Packet switching
Patent
1994-03-21
1995-10-17
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370 601, H04L 1256
Patent
active
054597269
ABSTRACT:
A device for initiating multiple timings has a supply of clock pulses. At each clock pulse, an entering cell is stored in a communication system with asynchronous time switching. The stored cell belongs to a virtual communication circuit that carries a number in the label of the cell. A random access, read-write timing memory (MT) has a plurality of addressable zones which normally store null or inactive bits. The memory (MT) is alternately addressed for writing and for reading. The memory (MT) comprises a data input (ED) to store, in a zone addressed for writing, a parameter bound to a characteristic of a virtual circuit. A data output (SD) delivers the content of the memory zone addressed during reading.
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Boyer Pierre
Servel Michel
Tranchier Didier
France Telecom
Nguyen Chau T.
Olms Douglas W.
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