Device for testing digital circuits using built-in logic block o

Details Device for testing digital circuits using built-in logic block o Device for testing digital circuits using built-in logic block o

1981-06-26

1982-07-20

Tokar, Michael J.

Electricity: measuring and testing

Plural, automatically sequential tests

371 25, G01R 1512

Patent

active

043408575

ABSTRACT:
A device for testing a digital electronic circuit, having a first BILBO for generating a pseudo-random test pattern, a second BILBO for analyzing a parallel-input signature, a decoder and at least one status indicator for indicating the status of a circuit under test.

REFERENCES:
patent: 3636443 (1972-01-01), Singh
patent: 3723868 (1973-03-01), Foster
patent: 3761695 (1973-09-01), Eichelberger
patent: 3783254 (1974-01-01), Eichelberger
patent: 3784907 (1974-01-01), Eichelberger
In--circuit Tester using Signature Analysis Adds Digital LSI to its Range, by Craig Pynn, Electronics, May 24, 1979, pp. 153-157.
B. Koenemann et al. "Built--In Logic Block Observation Techniques", published in Proceedings, 1979 IEEE Test Conference, Cherry Hill, New Jersey, IEEE, New York, NY, Session 2 at pp. 37-41.
T. Williams et al., "Random Patterns Within a Structured Sequential Logic Design", published in Proceedings, 1977 Semiconductor Test Symposium, Oct. 25-27, 1977, Cherry Hill, NJ, IEEE, New York, NY at pp. 19-27.

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