Device for synchronizing the output pulses of a circuit with an

Details Device for synchronizing the output pulses of a circuit with an Device for synchronizing the output pulses of a circuit with an

1987-06-24

1989-03-14

Lall, Parshotam S.

Boots, shoes, and leggings

375120, 331 1R, 331 25, G05B 1902, H03D 324, H03L 700, H03L 708

Patent

active

048130052

ABSTRACT:
A device for synchronizing the output test pattern signals of a test circuit with the clock signal of a device under test (DUT). The invention uses a programmable delay in the feedback loop of a phase locked loop system to adjust the phase of the test pattern signals to be synchronized with the clock of the device under test (DUT).

REFERENCES:
patent: 4145667 (1979-03-01), Messerschmitt
patent: 4166979 (1979-09-01), Waggener
patent: 4215430 (1980-07-01), Johnson, Jr.
patent: 4225828 (1980-09-01), Watanabe et al.
patent: 4518998 (1985-05-01), Warner
patent: 4646030 (1987-02-01), Hollister
patent: 4698601 (1987-10-01), Alzawa
McCarthy et al., High-Frequency Analog Electronic Delay Using Phase-Locked-Loop Techniques, IBM Technical Disclosure Bulletin, vol. 19, No. 8, 2/77, p. 3131-3132.

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