Device for switching high speed protocol units, and correspondin

Details Device for switching high speed protocol units, and correspondin Device for switching high speed protocol units, and correspondin

1994-09-13

1996-03-26

Hsu, Alpus

Multiplex communications

Wide area network

Packet switching

370 601, 370 852, 370 8513, 370 942, H04Q 1104, H04J 302

Patent

active

055027180

ABSTRACT:
A high speed switching device among a multiplicity of processing modules, for enabling data exchanges of data organized into protocol units, includes a multiplicity of switching interface modules each including an FIFO input memory connected to an input bus and an FIFO output bus, a switching module capable of connecting each of the input buses with each of the output buses, and an arbitration and command module for commanding the switching effected by the switching module. The arbitration and command module commands switching once the destination switching interface module has at least one free space.

REFERENCES:
patent: 5088091 (1992-02-01), Schroeder et al.
patent: 5157654 (1992-10-01), Cisneros
patent: 5317565 (1994-05-01), Crouse et al.
patent: 5345447 (1994-09-01), Noel
"High Speed Transport Processor for Broad-Band Burst Transport System", H. Obara, T. Yasushi; IEEE International Conference on Communications '88, New York, 1988; pp. 922-927.
"Performance Analysis of Packet-Switched Multiple-bus Multiprocessor Systems", Q. Yang, L. N. Bhuyan, and R. Pavaskar; Proceedings, Real-Time Systems Symposium, San Jose, CA, Dec. 1987; pp. 170-178.
Preliminary Search Report in the French Patent Office re: French Application No. 93 11071, dated 31 May 1994.
DuBois and Rasure, "Design and Evaluation of a Distributed Asynchronous VLSI Crossbar Switch Controller for a Packet Switched Supercomputer Network", Computer Architecture News, Jun. 1991, pp. 69-79.

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