Boots – shoes – and leggings
Patent
1992-03-17
1994-05-17
Harrell, Robert B.
Boots, shoes, and leggings
395800, 364DIG1, 3642402, 3642423, G06F 1338
Patent
active
053135873
ABSTRACT:
A device for simultaneous data input and output and program execution support in digital processors is disclosed. The device includes a plurality of controllable input and output ports for inputting and outputting data from the device, a data cache memory which is selectively couplable to each of the plurality of input and output ports, and a controller for controlling the plurality of input and output ports and the data cache memory. The connectivity and controlablity provided by the present invention effectuates a transfer of data between any of the plurality of input and output ports or the data cache memory. The device provides multiport high-speed and high-throughput non-multiplexed data input and output while maintaining the speed and throughput characteristics of the digital processor because the input/output data transfer takes place simultaneously with digital processor program execution. The processor need not wait for data transfers from external data sources when this device is used. The non-multiplexed multiport configuration further allows data sources of different types, such as serial, parallel, and direct memory access, to be simultaneously connected to the device.
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Blasco Richard W.
Chan Kenneth M.
Chen Shieh C.
Patel Chandravadan N.
Ellis Richard Lee
Harrell Robert B.
Hitachi Micro Systems Inc.
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