Device for shielding transmission lines from ground or power...

Active solid-state devices (e.g. – transistors – solid-state diode – Transmission line lead

Reexamination Certificate

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Details

C257S662000

Reexamination Certificate

active

06791165

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of integrated circuits. The invention particularly relates to a device comprising an integrated circuit and a set of contacts for connecting said integrated circuit to at least one pair of transmission lines intended to convey electric signals to and/or from said integrated circuit, the set of contacts comprising at least a first pair of contacts intended to receive a first reference voltage, a second pair of contacts intended to receive a second reference voltage and a third pair of contacts, referred to as signal contacts, intended to be connected to said pair of transmission lines.
The invention finds numerous applications in the field of telecommunication, notably in optical transmission systems. It is particularly advantageous in high-rate applications.
2. Description of the Related Art
In the telecommunication applications using high-rate integrated circuits, it is often indispensable to use contacts realizing differential input/output access at a low voltage amplitude, for example, of the order of 0.2 V, notably of the CML (Common Mode Logic) type, LVDS (Low Voltage Differential Signaling) type, or other PECL (Positive Emitter Coupled Logic) types. These contacts are intended to be connected to differential transmission lines conveying differential signals materialized by tracks on a printed circuit board (PCB). The tracks should preferably be mutually protected from ambient electromagnetic perturbations, notably from interference or noise. Indeed, these perturbations are capable of considerably modifying the normal operation and performance of integrated circuits.
U.S. Pat. No. 6,215,184 describes a method of realizing a connection track for connecting integrated circuits on a printed circuit board by means of a set of connection points. The method neither describes nor suggests any specific means of shielding from noise and interference generated in the circuits. It neither suggests how these means should be made independent of the selected power supply configuration. In accordance with the considered application, the circuits may be fed in accordance with one of the possible power supply configurations, referred to as positive and negative. In accordance with the positive configuration, ground corresponds to the low voltage. In accordance with the negative configuration, ground corresponds to the high voltage. The shielding scheme imposes, in another respect and within the extent possible, to frame the signal by means of a “proper” reference, i.e. a non-parasitic reference, thus realizing an electromagnetic return path for the signal which is the least possible beset with noise. In general, this “proper” reference is connected to ground. In accordance with the power supply configuration of the application, positive or negative, the shielding scheme may thus have to be modified, which increases the costs of the circuits by possibly necessitating the provision of a set of contacts adapted to each power supply configuration.
SUMMARY OF THE INVENTION
It is an object of the invention to provide such a set of connections which comprises specific shielding means which are usable independently of the chosen power supply configuration.
To this end, an integrated circuit of the type described in the opening paragraph is characterized in that said signal contacts are surrounded by said first and second pairs of contacts.
These and other aspects of the invention are apparent from and will be elucidated, by way of non-limitative example, with reference to the embodiment(s) described hereinafter.


REFERENCES:
patent: 5796170 (1998-08-01), Marcantonio
patent: 5955789 (1999-09-01), Vendramin
patent: 5994766 (1999-11-01), Shenoy et al.
patent: 6057600 (2000-05-01), Kitazawa et al.
patent: 6329702 (2001-12-01), Gresham et al.
patent: 6373447 (2002-04-01), Rostoker et al.
patent: 6555907 (2003-04-01), Katoh
patent: 6563299 (2003-05-01), Van Horn et al.
patent: 6566601 (2003-05-01), Maetani
patent: 2002/0113309 (2002-08-01), Fazelpour
patent: 2003/0042596 (2003-03-01), Crane et al.
patent: 2003/0043558 (2003-03-01), Shirasaki
patent: 2003/0111714 (2003-06-01), Bates et al.
patent: 2003/0198032 (2003-10-01), Collander et al.

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