Device for setting a clock delay

Details Device for setting a clock delay Device for setting a clock delay

2008-05-27

2008-05-27

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S026000, C327S263000, C327S284000

Reexamination Certificate

active

07378892

ABSTRACT:
A device for setting a clock delay is proposed, wherein delayed output clock signals are generated with the aid of delaying means by delaying an input clock signal. The delaying means are configured to provide several differently delayed clock signals simultaneously. The device is configured to generate the at least one output clock signal depending on the differently delayed clock signals with a settable phase relationship to the non-delayed input clock signal, wherein the phase relationship is settable independently of the delay provided by the delaying means. It is particularly provided that the phase relationship between the delayed output clock signal and the non-delayed input clock signal is automatically controlled to a desired phase relationship independently of the delay supplied by the delaying means.

REFERENCES:
patent: 6720810 (2004-04-01), New
patent: 2002/0141527 (2002-10-01), Song
patent: 2004/0051576 (2004-03-01), Zhang et al.
patent: 2005/0140416 (2005-06-01), Rashid
patent: 2004165960 (2004-06-01), None

Affiliated with

Also associated with

Rating

Device for setting a clock delay does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device for setting a clock delay, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device for setting a clock delay will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2749785