Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-09-26
2006-09-26
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185290, C365S185180
Reexamination Certificate
active
07113430
ABSTRACT:
A device for reducing the effects of leakage current within electronic devices is disclosed. In one form, a high voltage driver includes a high voltage source coupled to at least one high voltage transistor and a leakage offset module coupled to at least a portion of one of the high voltage transistors. The leakage offset module includes a diode connected MOS device operable to generate an offset voltage and an MOS shunting device coupled in a parallel with the diode connected MOS device. During operation, the diode connected MOS device generates an offset voltage based on a sub-threshold leakage associated with using the high voltage source and the MOS shorting device is operable to short the diode connected MOS device when sub-threshold leakage current is relatively low.
REFERENCES:
patent: 5751651 (1998-05-01), Ooishi
patent: 6128368 (2000-10-01), Yeh
patent: 6272046 (2001-08-01), Shimada
patent: 6424098 (2002-07-01), Beland et al.
patent: 2858419 (2005-02-01), None
patent: 2126734 (1984-03-01), None
patent: WO 00/34956 (2000-06-01), None
Dinh Khoi V.
Hoefler Alexander
Jensen Robert A.
Rutledge Matthew B.
Freescale Semiconductor Inc.
Toler Larson & Abel, LLP
Tran Andrew Q.
LandOfFree
Device for reducing sub-threshold leakage current within a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device for reducing sub-threshold leakage current within a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device for reducing sub-threshold leakage current within a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3527808