Device for protecting a memory against attacks by error...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185200, C365S185210, C365S185220, C365S185330, C365S189070

Reexamination Certificate

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08045381

ABSTRACT:
A memory is secured against an error injection during the reading of a datum. The memory includes: means for reading a reference datum in the memory during a phase of reading a datum stored in the memory; means for comparing the reference datum read with an expected value; and means for generating an error signal if the datum read is different from the expected value. Application is provided particularly but not exclusively to the protection of memories integrated into smart cards.

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patent: 5652720 (1997-07-01), Aulas et al.
patent: 6160734 (2000-12-01), Henderson et al.
patent: 6661708 (2003-12-01), Cernea et al.
patent: 7218553 (2007-05-01), Devin
patent: 7283397 (2007-10-01), Harari et al.
patent: 7397702 (2008-07-01), Rolandi et al.
patent: 2004/0052110 (2004-03-01), Nguyen et al.
patent: 1 150 300 (2001-10-01), None
patent: WO 00/72117 (2000-11-01), None

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