Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2006-02-28
2006-02-28
Nguyen, Vinh (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S073100
Reexamination Certificate
active
07005879
ABSTRACT:
Noise reduction for application of structural test patterns to a Device Under Test (DUT) is accomplished with a capacitor “booster” bypass network on the probe card in which the capacitors are charged to a much higher voltage Vboostthan the DUT power supply voltage VDD. Charging the capacitors to a voltage N×VDD allows the buster network to store N times the charge of a conventionally configured capacitance network, and effectively provides N times the capacitance of the original network in the same physical space.
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ISSCC2000/Session 26/Analog Techniques/paper WP 26.7, Michael Ang, et al, “An On-chip Voltage Regulator using Switched Decoupling Capacitors”, Sun MicroSystems, Inc. Palo Alto, Ca., pp. 438-439, Digest of Techinical Papers.
Intel Test Tooling Operations, Intel Corporation, S. Mobin, et al., 2004 SouthWest Test Workshop, pp. 1-21 “Power Delivery Challenges of High Power Logic Device at Sort”.
Kaufman Stephen C.
Nguyen Jimmy
Nguyen Vinh
Whitham Curtis & Christofferson, P.C.
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