Device for neutralizing an electronic circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By pulse width or spacing

Reexamination Certificate

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Details

C327S020000

Reexamination Certificate

active

06184719

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 98-12187, filed Sep. 25, 1998, the entire disclosure of which is herein incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electronic circuits, and more specifically to a device for neutralizing an electronic circuit in the event of an anomaly in a clock signal.
2. Description of Related Art
In memory or microprocessor-type integrated circuits, a specified number of instructions (or micro-instructions) is executed during each period of the clock signal. For example, in an EEPROM, several clock periods are needed to perform one read or write cycle. The clock signal is generally generated by an external clock circuit. The duration of the high states (or pulses) of the clock signal and of the low states is fixed to ensure the proper operation of the electronic circuit. The minimum times for either of these states are generally specified in the specification of the circuit.
Sometimes the clock signal may have defects or anomalies corresponding to an excessively short duration of one of the states of the clock signal (i.e., the duration of the state in question is smaller than the corresponding minimum duration defined in the specification of the circuit). For example, a parasitic pulse may appear between two successive pulses of the clock signal. There are many causes for the presence of such anomalies in the clock signal. In particular, they may reveal a problem of electromagnetic compatibility. This deformation of the clock signal either interrupts the execution of the instruction currently being executed by the electronic circuit and stops the operation of this circuit, or generates the execution of a wrong instruction.
SUMMARY OF THE INVENTION
In view of these drawbacks, it is an object of the present invention to overcome the above-mentioned drawbacks and to prevent such undesirable consequences by providing a device that neutralizes the operation of the electronic circuit in the event of anomalies in the clock signal.
Another object of the present invention is to provide a device for neutralizing an electronic circuit whose rate is set by a clock signal in the event of an anomaly in the clock signal. Such anomalies include a duration of a pulse of the clock signal that is smaller than a first threshold value, and a duration between two pulses of the clock signal that is smaller than a second threshold value. The device includes an anomaly detector that activates an inhibition circuit to inhibit the operation of the electronic circuit when an anomaly is detected in the clock signal.
According to one embodiment of the present invention, the inhibition circuit temporarily interrupts the supply of the electronic circuit when an activation signal is received.
According to another embodiment of the present invention, the inhibition circuit temporarily neutralizes the electronic circuit when an activation signal is received.
According to yet another embodiment of the present invention, when an activation signal is received, the inhibition circuit neutralizes control signals from a control block of the electronic in order to prevent the execution of any operation in the electronic circuit.
Other objects, features, and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the present invention.


REFERENCES:
patent: 4434403 (1984-02-01), Chang
patent: 4471235 (1984-09-01), Sakhuja et al.
patent: 4857760 (1989-08-01), Stuebing
patent: 5155380 (1992-10-01), Hwang et al.
patent: 5225715 (1993-07-01), Mori et al.
patent: 5274591 (1993-12-01), Waller et al.
patent: 5455840 (1995-10-01), Nakauchi et al.
patent: 5461649 (1995-10-01), Bailey et al.
patent: 5812429 (1998-09-01), Downey et al.

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