Device for neutralization in an integrated circuit

Details Device for neutralization in an integrated circuit Device for neutralization in an integrated circuit

1997-12-18

2000-12-05

Zweizig, Jeffrey

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

H03L 700

Patent

active

061572276

ABSTRACT:
A neutralization device to reset or inhibit at least certain electronic functions of an integrated circuit depending on the level of the supply voltage Vdd comprises a conditional feedback means to deactivate it especially in standby mode and then eliminate its consumption, and to reactivate it for certain modes of operation of the integrated circuit.

REFERENCES:
patent: H497 (1988-07-01), Piasecki
patent: 4716323 (1987-12-01), Wada et al.
patent: 4873458 (1989-10-01), Yoshida
patent: 4886984 (1989-12-01), Nakaoka
patent: 4948995 (1990-08-01), Takahashi
patent: 4970408 (1990-11-01), Hanke et al.
patent: 5027006 (1991-06-01), Queinnec et al.
patent: 5115146 (1992-05-01), McClure
patent: 5442312 (1995-08-01), Walter
patent: 5528184 (1996-06-01), Gola et al.
patent: 5552736 (1996-09-01), Desroches
patent: 5565811 (1996-10-01), Park et al.
patent: 5612641 (1997-03-01), Sali
patent: 5696461 (1997-12-01), Germini
Patent Abstracts of Japan, vol. 013, No. 088 (E-721), Pub. No. 63266921, Pub. Date Apr. 11, 1988, Inventor: K. Takayuki "Power -On Reset Signal Generating Circuit".

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