Device for interfacing between a redundant-architecture computer

Details Device for interfacing between a redundant-architecture computer Device for interfacing between a redundant-architecture computer

1996-07-19

1998-07-07

Sheikh, Ayaz R.

39518209, G06F 1338

Patent

active

057782067

ABSTRACT:
In order to connect a computer comprising plural redundant processors to at least one digital data transfer bus, the interfacing device embodying the invention comprises: a means for synchronizing and comparing the transmission and reception requests respectively transmitted by the processors, and for triggering processing of a request when the latter has been transmitted by all the processors, a means for transferring the data blocks to be transmitted or received between a controller of said bus and the respective working memories of the processors, and a means for triggering the transfer of a data block if the latter is simultaneously at the output of all the processors, from one of the working memories to said bus controller, with a view to transmission thereof on said bus.

REFERENCES:
patent: 4523272 (1985-06-01), Fukunaga et al.
patent: 4543627 (1985-09-01), Schwab
patent: 5226152 (1993-07-01), Klug et al.
patent: 5491787 (1996-02-01), Hashemi
patent: 5550978 (1996-08-01), Takahashi et al.
patent: 5586256 (1996-12-01), Thiel et al.

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