Device for improving the switching efficiency of an...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S537000, C327S543000, C363S060000, C307S110000

Reexamination Certificate

active

06177829

ABSTRACT:

TECHNICAL FIELD
The present invention relates in general to an multistage voltage generator system and in particular to a charge pump circuit that uses a configuration of switching transistors to transfer charge though succeeding stages while minimizing charge back to a preceding stage.
BACKGROUND OF THE INVENTION
The background is described in connection with a integrated circuit charge pump of the type commonly employed in a wide array of electronic system designs and applications. It should be understood, however, that the principles disclosed may apply to designs where system board space is limited and precise current switching is a requirement.
In integrated circuit design, it is often necessary to employ a multi-level driver that provides voltages higher than the supplied voltage rails to the system. For example, it is common to float the voltage into the gate of an NMOS transistor at a level above the supply rail in order to keep the efficiency of the circuit up and make the drop across the high side NMOS small. A common technique for doing this is to build a charge pump on the chip or printed circuit board.
Standard integrated circuit charge pumps are readily available from a variety of manufacturers. In general, charge pump designs vary according to the size of the load and the amount of space available with a particular application. A charge pump may be either all on-chip or partially off-chip with the primary factor being the size of the charging capacitors. Where the size of the charging capacitors are large, a partially off-chip solution is often employed to accommodate the larger charging capacitors which require more current to reach the high voltage side of the charge pump.
Prior art charge pumps use one or more “blocking” diodes that allow charge to be transferred from a first capacitor, i.e. the pumping capacitor, to a second storage capacitor. A voltage level sufficient to drive a blocking diode is necessary to permit charging of the storage capacitor. This configuration is illustrated in
FIG. 1
, wherein a standard charge pump doubler circuit
10
is shown using blocking diodes D
1
and D
2
.
In operation the blocking or pump diodes D
1
and D
2
are used to allow charge to be transferred from the pumping capacitor
14
(Cp) to a storage capacitor
20
(Cs). A driver circuit
11
comprising a buffer with a high current capability receives an oscillating input
30
that sets the switching rate of the diodes D
1
, D
2
. The diodes D
1
and D
2
are used to block current in one direction, while maintaining current flow into either the pump capacitor
14
(Cp) or the storage capacitor
20
(Cs).
Due to the drops across the diodes D
1
and D
2
, however, the drop across the storage capacitor
20
can only approximately double the supply voltage Vs. Thus, a limitation inherent to the doubler configuration
10
is the losses due to forward drops on the blocking diodes in the charging path.
Additionally, the blocking diodes D
1
and D
2
have internal parasitics which steal current or charge from the capacitors
14
and
20
thus lowering the charge pump's efficiency. A schottky diode with a small forward drop may be used to limit such parasitics, but integrated schottkys are usually very large and area inefficient in high current applications. Additionally, the large series resistance of schottky diodes reduces the charge pump efficiency making their practicality limited to integrated applications.
SUMMARY OF THE INVENTION
An improved charge pump device uses switching transistors rather than diodes to increase efficiency of the circuit and limit parasitic losses inherent to prior art charge pumps. The design synchronizes the switching transistors in such a way that changes to the charge pump circuitry are limited. Each transistor switch is configured to direct current in the right direction while maintaining the charge over the storage capacitor stable.
The charge pump circuit can be staged to implement either a single or multistage configuration. When the state or the output level for the previous stage is at the right level, the next stage is charged by coupling the output from one stage to the next stage via the negative terminal of the storage capacitor, which is connected to ground. The positive terminal of the capacitor is coupled to a transistor switch which turns ON only when the negative terminal of the capacitor is pulled to ground.
Disclosed in one embodiment, is an improved charge pump device using switching transistors instead of diodes that are turned ON and OFF in a way that minimizes charge back into a prior stage of the device. Charge is efficiently transferred from a pump capacitor to a storage capacitor by precisely switching an oscillating waveform into a level shifter. A driver circuit drives the gate of a first transistor switch which, in turn, biases a second transistor on during low state of the oscillating waveform. The transistors are more area efficient than prior art diodes and, as such, provide more efficient switching control of the charge transfer from the pump capacitor to the storage capacitor.
A supply rail is used to charge the pump capacitor when the first transistor is in its active region during the low state of the oscillating waveform applied by the drive circuit. The transistor turns OFF during the high state of the waveform causing the charge built-up on the pump capacitor to be transferred to the storage capacitor. The drive circuit is coupled to the negative terminal of the pump capacitor allowing a charge to build across the storage capacitor to a level approximately twice the supply voltage.
The level shifter is used to synchronize the oscillating waveform so that no charge is lost from the pump capacitor back to the supply or to a preceding stage in a multistage configuration.
Other aspects of the invention including its advantages and specific implementations are understood by those skilled in the art by reference to following detailed description taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 4029973 (1977-06-01), Kobayashi et al.
patent: 5589793 (1996-12-01), Kassapian
patent: 5889428 (1999-03-01), Young
patent: 5912560 (1999-06-01), Pasternak
patent: 5942932 (1999-08-01), Shen

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