Boots – shoes – and leggings
Patent
1995-06-06
1996-09-03
Pan, Daniel H.
Boots, shoes, and leggings
364DIG1, 364DIG2, 395869, 395870, 395800, G06F 9308, G06F 9315, G06F 9305
Patent
active
055533094
ABSTRACT:
A logical expression operation device is embodied in hardware and is provided with an evaluation value operation means to operate logical expressions in vector data format and an evaluation value holding means to hold the operation result as intermediate evaluation values, and a control means which sequentially reads out the components of the logical expressions, judges the type of read component and controls the applicable means based on the judgment result and the status of the means to execute evaluation of said logical expressions with omitting the operation by the evaluation value operation means for a part in the logical expression corresponding to the secondary operated data of a particular operator. A vector operation device is provided with a data selecting means which reads out one of the vector data held at an input vector register and one of the data held at a mask register at a time and outputs the data as the first output data if the data from the mask register has a logical value "1" and as the second output data if the data from said mask register has a logical value "0". It is also provided with a first compress circuit which sequentially stores the first output data to the first output vector register and a second compress circuit which sequentially stores the second output data from said data selecting means to the second output vector register.
REFERENCES:
patent: 4490786 (1984-12-01), Nakatani
patent: 4656581 (1987-04-01), Ohwada
patent: 4852049 (1989-07-01), Sakai
patent: 4881168 (1989-11-01), Inagami
patent: 4903228 (1990-02-01), Gregoire et al.
patent: 5109523 (1992-04-01), Kanada et al.
Asai Kiyoshi
Nishikawa Takeshi
Seo Yoshiki
Japan Atomic Energy Research Institute
NEC Corporation
Pan Daniel H.
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