Coded data generation or conversion – Digital code to digital code converters – With error detection or correction
Patent
1996-06-18
1998-03-03
Gaffin, Jeffrey A.
Coded data generation or conversion
Digital code to digital code converters
With error detection or correction
341 95, 341 51, 371 377, 371 471, H03M 1300
Patent
active
057240345
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The invention relates to a device for establishing boundaries in a bit scream (cell delineation), comprising into a second number of bits, which converting means comprise at least a first input for receiving at least one bit situated within the first number of bits and comprise at least a second input for receiving at least one bit situated outside the first number of bits, and of bits of the bit stream, which first number, second number and third number are each at least equal to one. Such a device is known from U.S. Pat. No. 5,131,012.
In general, if a boundary to be established is situated at a known distance from the first number of bits of the bit stream, the position of this boundary is known as soon as it has been established that the second number of bits agrees with the third number of bits of the bit stream. In this context said third number of bits is situated, for example, directly next to, or at a known distance from, the first number of bits, and at least until the boundary has been established, the conversion process and the subsequent comparison process should take place at regular intervals.
A bit stream defined, for example, in accordance with CCITT 1.432 4.5 consists of cells, each cell comprising 53 bytes of eight bits each. The problem of establishing cell boundaries in this bit stream, given a particular bit clock, is called "cell delineation" in technical terms. Each cell has a header which, for example, comprises five bytes. The conversion process in this case comprises the calculation of a cyclical redundancy code or CRC over the first four bytes (the first number of bits) of the header consisting of, for example, five bytes, which calculated CRC has a size of one byte (the second number of bits). The comparison process in this case comprises the mutual comparison of the calculated CRC (the second number of bits) and the fifth byte (the third number of bits) of the header consisting of, for example, five bytes. The calculation of the CRC is effected on the basis of a generator polynomial associated with the CRC, for example G(x)-x.sup.8 +x.sup.2 +x+1 (or 100000111). The first four bytes U(x) are multiplied by x.sup.8 (or padded on the right with 00000000), after which a division is carried out by G(x), which yields a value Q(x) and a remainder R(x). The CRC over U(x) is then equal to the remainder R(x).
The calculation of the CRC over the first four bytes and the subsequent comparison of the calculated CRC with the fifth byte should take place at regular intervals. In principle this should be done by bit-shifting, which in the worst case affords the boundary to be established after 53 times eight minus 1 bit-shifts. As it is very difficult, however, if bit rates are very high (for example 600 Mbit/s), to carry out the said calculation of the CRC during one bit period, a different solution has been chosen. This different solution comprises the calculation, for each byte-shift, of the CRC over the first four bytes and the subsequent comparison of the calculated CRC with the fifth byte, which involves, after 57 byte-shifts and still no CRC corresponding to the fifth byte having been found, one bit-shift taking place, whereupon again at most 57 byte-shifts take place, each byte-shift again involving the calculation and the subsequent comparison, etc. In the worst case, this solution affords the boundary to be established after approximately eight times 57 byte-shifts, which means, with respect to the solution mentioned earlier, that on average somewhat more calculations and comparisons are required and, on average, the boundary is established only after a time span approximately eight times longer. On the other hand, however, eight times more time is available for one calculation and a subsequent comparison.
The drawback that the boundary can only be established after eight or more cells have been passed can be overcome at the hand of the device disclosed in U.S. Pat. No. 5,131,012. This device generates per bit-shift a new second number of bits as a functi
REFERENCES:
patent: 5155487 (1992-10-01), Tanaka et al.
patent: 5267249 (1993-11-01), Dong
patent: 5570368 (1996-10-01), Murakami et al.
patent: 5619516 (1997-04-01), Li et al.
Nielander Johan Wieant Gerlach
Vankan Franciscus Anna Gerardus
Gaffin Jeffrey A.
Koninklijke PTT Nederland N.V.
Kost Jason V.
Michaelson Peter L.
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