Coded data generation or conversion – Converter calibration or testing
Reexamination Certificate
2000-04-03
2001-08-28
Phan, Trong (Department: 2819)
Coded data generation or conversion
Converter calibration or testing
C341S155000
Reexamination Certificate
active
06281819
ABSTRACT:
1. FIELD OF THE INVENTION
The present invention generally relates to a device and method therefor for ENOB (effective number of bits) estimation for an ADC (analog-to-digital converter) based on dynamic deviation, wherein the correlation between dynamic deviation and ENOB is analyzed so as to provide a novel device and method therefor to estimate and calculate ENOB for an ADC. Such device and method can be used in fields of testing and measuring.
2. BACKGROUND OF THE INVENTION
Static noise is one of the related parameters generally used in ADCs (analog-to-digital converters). However, static noise is a static parameter and thus is not suitable for use in high speed ADCs. Moreover, ENOB (effective number of bits) is another key parameter for use in ADCs. The state-of-the-art measuring techniques utilize signal generators with high-speed and high-resolution to generate sinusoids that are pure enough. However, commonly used signal generators fail to meet the requirements for both high-speed and high-resolution. In lack of high quality signal generators, there is therefore a need for developing a method for ENOB estimation.
Several specifications must be examined when one desires to choose an ADC. Some of these parameters vary with different input frequencies, while others do not. The parameters that do not vary with different input frequencies are categorized as static parameters. The major static parameters for use in ADCs are differential non-linearity (DNL), integral non-linearity (INL), gain error, offset error, static noise, missing code and monotonic.
Since the parameters mentioned above can not vary with different input frequencies and thus fail to serve as parameters for evaluating the dynamic performance of a high-speed ADC. The major dynamic parameters for use in ADCs are signal-to-noise ratio (SNR), total harmonic distortion (THD), SNR and distortion (SINAD), Spurious-free dynamic range (SFDR), and effective number of bits (ENOB).
Another dynamic parameter for use in ADCs is dynamic deviation that is defined as the number of bits of instability in the output code under the condition that an ADC samples a constant level of a full-scale sinusoid.
Clock jitter is one of the factors that contribute to parameter degradation when an ADC is operated at high-speed and high-resolution. The jitter coming from the aperture uncertainty in the clock source produces enormous side lobes, degrading the dynamic performance. Fast-slewing square-wave clock source is recommended for testing high-speed and high-resolution ADCs. The clean, linear analog supply is used to avoid noises that could degrade ADC parameters.
The digital outputs of ADCs are collected in a high-speed data-capture memory. The collected data are then transferred to a computer for storage and analysis. There are two approaches to ENOB calculation from the collected data. One is derived from a formula by performing FFT (Fast Fourier Transform) operations. A windowing function is necessarily used to avoid errors resulting from spectral leakage due to non-coherence. The other way to calculate ENOB computes RMS error by using a least-mean-square curve fitting technique.
No matter which approach is chosen for ENOB calculation of a high performance ADC, signal generators with high-resolution and high-speed are required to provide sinusoids that are pure enough. If the provided sinusoids are not pure enough, the dynamic performance of an ADC is thus difficult to evaluate.
BRIEF DESCRIPTION OF THE INVENTION
In order to overcome the problems that have been previously discussed above, the present invention provides a novel parameter for use in ADCs, namely, dynamic deviation. Dynamic deviation can be used to replace static noise and also evaluate the dynamic performance of an ADC since the value of the former varies with different input frequencies of an ADC. Besides, dynamic deviation is extracted in a practical test setup, so that it also takes the effects of noises and clock jitter into account. The present invention is also suitable for use in signal systems with higher input frequencies.
On the other hand, by establishment of the model of the distribution of dynamic deviation versus input frequency, we are able to analyze the relation between the distribution of dynamic deviation and the input frequency, and further develop a method for ENOB estimation. Experimental results demonstrate that high accuracy of the proposed approach is achieved. Accordingly, the present invention provides researchers, circuit designers, and testing engineers who lack high-speed and high-resolution ADCs a method for ENOB estimation or test grading.
In order to accomplish the foregoing objects, the present invention provides a method for ENOB estimation for an ADC based on dynamic deviation, comprising steps of:
(1) building up the distributions of dynamic deviations for the interested input frequencies at which ENOBs will be estimated;
(2) calculating the ideal values that are sampled by an ADC in an ideal case according to the frequency and amplitude of the sinusoid and sampling rate of ADC;
(3) calculating the ideal codes with respect to the ideal values according to step (2);
(4) calculating the estimated codes by adding variations to the ideal codes according to step (3) with respect to the distributions of dynamic deviations according to step (1); and
(5) estimating ENOB by performing FFT operations on these estimated codes according to step (4).
The distribution of dynamic deviation according to step (1) exhibits as a Gaussian distribution and varies its peak and expansion with different input frequencies. An ADC with better dynamic performance has higher peak and narrower expansion in the distribution of dynamic deviation. Therefore, dynamic deviation can serve as a novel parameter for use in evaluation of the performance of an ADC. Moreover, a more concentrated distribution of dynamic deviation is obtained for an ADC with a lower input frequency.
REFERENCES:
patent: 5525984 (1996-06-01), Bunker
patent: 6177894 (2001-01-01), Yamaguchi
Wang Hui-Min
Wu Wen-Ching
Industrial Technology Research Institute
Phan Trong
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