Device for eliminating clock signal noise in a semiconductor...

Details Device for eliminating clock signal noise in a semiconductor... Device for eliminating clock signal noise in a semiconductor...

2007-11-13

2007-11-13

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S294000, C327S263000

Reexamination Certificate

active

11216142

ABSTRACT:
A semiconductor integrated circuit includes a integration circuit which has a first integrating portion and a second integrating portion. The semiconductor integrated circuit also includes a data input portion, data processing portion and data output portion. A clock signal is inverted by an input buffer and applied to a NAND gate together with a mask signal. When the signal from the NAND gate rises, the signal of the second integrating portion falls after a delay time due to the integration circuit. The signal from the NAND gate is applied together with the signal from the second integrating portion to a second NAND gate, and the signal from the second NAND gate is fixed at “L” during the period from the time of the rise of the clock signal for the duration of the delay time of the integration circuit. The signal from the second NAND gate is delayed by a third integrating portion and a delay time of the third integrating portion is added by an AND gate to generate a mask signal. In the meantime, the signal from the second NAND gate is also inverted by an inverter, and is supplied as an internal clock to the data input portion, data processing portion, and data output portion.

REFERENCES:
patent: 5132563 (1992-07-01), Fujii et al.
patent: 5537067 (1996-07-01), Carvajal et al.
patent: 6121813 (2000-09-01), Furuchi
patent: 6225844 (2001-05-01), Fujiwara
patent: 6310506 (2001-10-01), Brown
patent: 6462597 (2002-10-01), Lee
patent: 6650168 (2003-11-01), Wang et al.
patent: 6753707 (2004-06-01), Honda et al.
patent: 10-064268 (1998-03-01), None

Affiliated with

Also associated with

Rating

Device for eliminating clock signal noise in a semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device for eliminating clock signal noise in a semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device for eliminating clock signal noise in a semiconductor... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3839626