Device for detecting failure of microcomputer in antilock contro

Fluid-pressure and analogous brake systems – Speed-controlled – With failure responsive means

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Details

30312204, 30312207, B60T 896

Patent

active

057355835

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

This invention relates to an antilock controller for controlling automotive brakes.


DESCRIPTION OF THE RELATED ART

An increasing number of modern cars are equipped with antilock controllers for controlling their brakes most efficiently according to the road conditions.
An antilock controller acts to reduce the brake fluid pressure on the wheel cylinder upon detecting any lockup tendency of the corresponding wheel, and re-increase the brake fluid pressure when the lockup tendency disappears. By repeating such pressure reductions and re-increases in a very short time, the car can be decelerated quickly while keeping its stability.
Since an antilock controller is a device which reduces the brake fluid pressure while brakes are being applied, it is required to operate with high reliability not only while the entire brake system is functioning normally, but even if the system has failed. Namely, absolute reliability is required for each of its various functions, including the function of calculating the wheel speeds, acceleration, estimated vehicle speed, slip rates, etc., and the function of producing a pressure reduction signal to reduce the fluid pressure on a wheel cylinder according to the results of calculation. Furthermore, it has to have a function of prohibiting pressure reduction if the brake system has failed.
U.S. Pat. No. 4,546,437 and Unexamined Japanese Patent Publication 63-233401 disclose antilock control circuits that satisfy all of the abovementioned requirements.
The control circuit disclosed in the former has two mutually independent microcomputers. Each computer receives the data from the other computer and monitors it. One of the computers is a main computer which controls control valves and other brake parts.
The control circuit disclosed in the latter also comprises two mutually independent microcomputers. Each input signal is split into two identical signals, which are inputted in the respective microcomputers. Based on the signals received, the two computers perform identical calculations and output signals independently of each other. If the output signals of the two computers are identical, antilock control is carried out based on the output signals. If these two signals are different and the difference is within a permissible range, antilock control is carried out based on signals determined by such difference. If the difference is too large, antilock control function is deactivated.
Both of these conventional antilock control circuits require more than one microcomputer and thus tend to be costly, though their reliability is fairly high.
One possible solution to this problem is to use a single microcomputer having the same function as is processed in a conventional one-assembly microcomputer.
It is possible to provide two programs in such a microcomputer to process signals split in two lines. But logic operations according to both programs are carried out in a single unit. Thus, it is impossible to detect a failure of the single unit.
An object of this invention is to provide an antilock controller in which signals split in two lines are processed in the logic operation circuit of a single microcomputer and which is less expensive and operates as safely, stably and reliably as a conventional controller using two independent microcomputers.
Another object of the invention is to provide a control logic operation circuit for use in an antilock controller which has a single microcomputer including a checking circuit for checking the commands produced by its central processing logic circuit according to a simple check program, and which operates as safely, stably and reliably as a conventional control circuit.


SUMMARY OF THE INVENTION

According to this invention, there is provided an antilock controller comprising wheel speed detecting means for producing wheel speed signals, means for splitting the wheel speed signal into two identical signals, and a single control logic operation circuit including at least two input terminals through which the split sign

REFERENCES:
patent: 4745542 (1988-05-01), Baba et al.
patent: 4773072 (1988-09-01), Fennel
patent: 5001641 (1991-03-01), Makino
patent: 5176429 (1993-01-01), Junichi et al.
patent: 5265944 (1993-11-01), Gloceri

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