Device for deriving a clock signal using a gated phase-locked lo

Details Device for deriving a clock signal using a gated phase-locked lo Device for deriving a clock signal using a gated phase-locked lo

1989-06-07

1990-12-04

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

375120, 358148, H04L 708, H04L 709

Patent

active

049759280

ABSTRACT:
A device for deriving a clock signal from an electric signal made up of consecutive signal blocks (B.sub.i), each signal block having a first block section (EBD.sub.i) containing a first signal and a second block section (TBD.sub.i) containing a second signal. The input terminal (1) is coupled to two parallel circuits via a switch (3), one of the parallel circuits including a high-pass filter (8). The circuits have their outputs coupled to the inputs of a phase-locked loop (5) and a code-word detector (6). The output (13) of the code-word detector (6) is coupled to a control signal generator (15). The control signal generator (15) generates control signals which are applied to a control signal input (9) of the switch. During normal operation, the switch (3) defines a time window for the electric signal, so that only the first block sections are applied to the code-word detector (6) and the phase-locked loop (5) to derive the clock signal from the signal information in these first block sections. When the device is switched on, the time window function is disabled. The complete signal is applied to the inputs of the phase-locked loop (5) and the code-word detector (6) via the high-pass filter (8). When the code-word detector (6) has detected a code-word, the timing of the device is in step and changing over to normal gated operation is possible.

REFERENCES:
patent: 4376268 (1983-03-01), Moriya et al.
patent: 4785468 (1988-11-01), Yoshida

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