Device for defeating reverse engineering of integrated...

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure

Reexamination Certificate

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C382S312000

Reexamination Certificate

active

06515304

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to reverse engineering of integrated circuits by optical monitoring and analysis, and more particularly to devices for defeating such reverse engineering of integrated circuits.
2. Description of the Prior Art
The term “reverse engineering” has the general meaning of understanding how any item operates or was constructed, based mainly on knowing the general function of the item and any information that can be learned by direct examination of the item itself. Reverse engineering is considered “non-destructive” if the item is still functional at the end of the reverse engineering process.
With regards to an integrated circuit (IC) made up from transistors, diodes, and passive devices, reverse engineering can be applied to either (i) determine the processes and materials that went into the IC manufacturing process, or (ii.a) determine the physical locations of the subcircuits or circuit elements comprising the IC, (ii.b) determine the logical functions and other functional characteristics of the subcircuits or circuit elements comprising the IC, (ii.c) determine the device-level schematic of the transistors comprising each subcircuit or circuit element, (ii.d) determine the performance of the subcircuits or circuit elements comprising the IC and (ii.e) determine stored information necessary for the operation of some circuit. In this disclosure, we are concerned with defeating certain of these second types of reverse engineering.
Conventional methods of reverse engineering are usually physical methods that are often destructive of an IC. Often these methods require unpackaging, and sometimes at least partially dissecting the IC, making it very difficult to use the IC afterwards. Further, these prior art methods typically involve significant manual intervention by technical personnel. Therefore, the methods can be tedious and inefficient. In addition, some kinds of information about circuits, such as the contents of non-volatile semiconductor memories often cannot be obtained by disassembly of the chip.
The least destructive, or non-destructive, methods for reverse engineering, such as looking at power consumption or looking at RF emissions from an IC, normally have limited or no spatial resolution. Therefore, they usually cannot provide information at the gate level about either the physical location of subcircuits of the chip or the device-level schematic of the transistors comprising each subcircuit. They cannot generate this kind of information in reverse engineering a circuit. They therefore make little use of information about the spatial layout of a chip that can be readily obtained by optical inspection. Reverse engineering a complex IC without spatial information about specific devices that are in close proximity to each other on the IC can be very difficult with these methods. Additionally, such conventional techniques are readily defeated by a number of simple countermeasures that are well known.
In view of the above mentioned problems with prior art methods of reverse engineering, the present inventors have taught methods for reverse engineering by monitoring induced light emissions from the active elements in integrated circuit (IC) chips in a patent application Ser. No. 09/468,999, entitled “Method And Apparatus For Reverse Engineering Integrated Circuits By Monitoring Optical Emission”, filed on Dec. 21, 1999, by inventors Kash et al., and the teachings of which are incorporated herein by reference. Generally, light emissions from active elements can be monitored using methods and apparatus that have been taught in the following identified patent applications, the first one being Ser. No. 08/683,837, entitled “Non-invasive optical method for measuring internal switching and other dynamic parameters of CMOS circuits”, filed on Jul. 18, 1996, by inventors Kash et al., and the second one being Ser. No. 09/026,063, entitled “System and method for compressing analyzing time-resolved optical data obtained from operating integrated circuits”, filed on Feb. 19, 1998, by inventors Kash et al., and which are both owned by the assignee of the present invention, and the teachings of which are incorporated herein by reference.
The methods of reverse engineering integrated circuits by monitoring induced light emissions from the active elements in IC's, such as taught by the present inventors in patent application Ser. No. 09/468,999, are a very powerful tool for extracting information from an integrated circuit as well as for determining the circuit topology. A manufacturer of an integrated circuit, in certain applications, may wish to protect an integrated circuit from such reverse engineering analysis. For example, a SmartCard or other secure electronic device that contains at least one IC with confidential information may need its electronic memory protected from unauthorized reverse engineering.
The above optical methods of non-destructively obtaining information about the design, operation, programmable parameters, and performance of an integrated circuit represent one possible approach to reverse engineering an integrated circuit by combining the physical appearance of the circuit elements, and using the effect of the operation of the circuit on light. Other approaches producing similar information include the measurement of the modulation of a light beam by voltages in an IC.
Accordingly, the inventors of the present invention recognize a need for a manufacturer of an integrated circuit to efficiently limit the information provided by the generation and/or the detection of induced light emissions and/or the modulation of the optical response from the active elements in IC's to defeat such reverse engineering as discussed above.


REFERENCES:
patent: 4105216 (1978-08-01), Graham et al.
patent: 5384457 (1995-01-01), Sommer
patent: 5940545 (1999-08-01), Kash et al.
patent: 6028952 (2000-02-01), Kash et al.
Kash et al., “Dynamic Internal Testing of CMOS Circuits Using Hot Luminescence”, IEEE Electron Device Letters, vol. 8, No. 7, Jul. 1997, pp. 330-332.

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