Device for decoding signals of the MPEG2 type

Details Device for decoding signals of the MPEG2 type Device for decoding signals of the MPEG2 type

1997-02-05

2000-07-18

Kelley, Chris S.

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

348419, 348423, 36523003, H04B 166, H04N 712

Patent

active

060917687

ABSTRACT:
Device for decoding encoded digital signals corresponding to n different types of data, for example audio, video or graphic data. Such decoder includes, upstream of the decoder itself, an input interface which includes a storage sub-assembly composed of n parallel registers for receiving said data. The input interface also includes, between such registers and an external DRAM-type memory of the decoder, a series arrangement of a first buffer memory (43) for storing the contents of a register as soon as one of them is full, and a second buffer memory (44) constituted by n parallel blocks (45a, 45b, . . . ) for storing, per type of data, the contents of the first buffer memory. At the output of such storage blocks, the corresponding requests for access are carried out by a synchronizing clock (47) via an arbiter so as to transmit the contents of the blocks to the external DRAM memory.

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T. Fautier, "VLSI Implementation of MPED Decoders", Chapter 3.22, pp. 164-172.
ISO/IEC JTC 1/SC 29 published on Apr. 27 1995 by the International Standardization Organization ISO, "Revised text for ITU-T Recommendation H.222.0/ISO/IEC 13818-1, Information Technology--Generic coding of moving pictures and associated audio information: Systems".

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