Coded data generation or conversion – Digital code to digital code converters – To or from nrz codes
Reexamination Certificate
2000-02-23
2001-06-12
Young, Brian (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from nrz codes
C341S059000, C341S069000
Reexamination Certificate
active
06246348
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, in general, to coded data generation or conversion and, in particular, to converting signals to NRZ format.
BACKGROUND OF THE INVENTION
Signals are transmitted in a wide range of formats, voltage levels, and speeds (e.g., digital, analog, TTL, MECL, T
1
, fiber optic, etc.). A signal in one format may be incompatible with a signal in another. Therefore, different procedures may be required to process different signal formats. Different procedures may require the use of different processing equipment. Such equipment may be expensive, and the operator may be required to receive extensive training in order to be able to operate the equipment.
U.S. Pat. No. 5,113,186, entitled “APPARATUS FOR CONVERTING AN ALTERNATE MARK INVERSION SIGNAL TO UNIPOLAR SIGNALS WITH FREQUENCY DEPENDENT AMPLIFICATION,” discloses a device for converting an alternate mark inversion (AMI) signal into three different unipolar signals. An AMI signal has three logic levels (i.e., a reference level, a logic one level which is a voltage above the reference level, and a logic zero level which is a voltage below the reference level. The device of U.S. Pat. No. 5,113,186 provides a first signal consisting of the logic one components of an AMI signal, a second signal consisting of the logic zero components of the AMI signal where the logic zero level is converted to the logic one level, and a third signal consisting of both the logic one levels and the logic zero levels of the AMI signal where the logic zero level is converted to the logic one level. U.S. Pat. No. 5,113,186 does not process multiple signals as does the present invention and does not include the other features of the present invention. U.S. Pat. No. 5,113,186 is hereby incorporated by reference into the specification of the present invention.
U.S. Pat. No. 5,248,969, entitled “PHASE COMPARING AND CMI/NRZ DECODING APPARATUS,” discloses a device for producing a clock pulse at the center of the CMI data. U.S. Pat. No. 5,248,969 does not process multiple signals as does the present invention and does not include the other features of the present invention. U.S. Pat. No. 5,248,969 is hereby incorporated by reference into the specification of the present invention.
U.S. Pat. No. 5,657,017, entitled “TELEMETRY BI-PHASE-LEVEL TO NON-RETURN-TO-ZERO-LEVEL SIGNAL CONVERTER,” discloses a device for converting an RZ signal to an NRZ signal. U.S. Pat. No. 5,657,017 does not process multiple signals as does the present invention and does not include the other features of the present invention. U.S. Pat. No. 5,657,017 is hereby incorporated by reference into the specification of the present invention.
U.S. Pat. No. 5,892,797, entitled “SYSTEM AND METHOD FOR RECOVERING DATA ENCODED USING MANCHESTER CODE AND OTHER BI-PHASE LEVEL CODES,” discloses a device for and method of recovering a data signal and a clock signal from a data signal encoded in a digital code. U.S. Pat. No. 5,892,797 does not process multiple signals as does the present invention and does not include the other features of the present invention. U.S. Pat. No. 5,892,797 is hereby incorporated by reference into the specification of the present invention.
SUMMARY OF THE INVENTION
It is an object of the present invention to convert each of a multitude of data signals to NRZ format in one of a user-selectable output-signal formats.
It is an object of the present invention to convert each of a multitude of data signals to NRZ format in one of a user-selectable output-signal formats while doing a periodic test of the operation of the present invention.
It is another object of the present invention to convert each of a multitude of data signals to NRZ format in one of a user-selectable signal formats, where the data signal is selected from the group of signal types consisting of RS232, RS422, sine wave, analog, TTL, LVDS, MECL, PECL, T
1
, E
1
, T
2
, E
2
, T
1
C, T
3
, E
3
, STM-
1
, E
4
, CMI, OC
3
, and fiber optic.
It is another object of the present invention to convert each of a multitude of data signals to NRZ format in one of a user-selectable output-signal formats, where the output-signal format is selected from the group of output-signal formats consisting of RS422, TTL, LVDS, ECL, MECL, PECL, and DECL.
The present invention is a device for converting data signals of various formats to NRZ format in a user-selectable output-signal format with automatic self-testing. The device
1
at least one first channel, at least one second channel, at least one third channel, and at least one fourth channel.
The first channel processes data signals in the RS232, RS422, sine wave, analog, TTL, LVDS, MECL, and PECL formats.
The first channel includes a first input and second input for receiving an input signal or a test signal, a first control input for inverting or not inverting the input signal, a second control input for selecting the type of output format to which the input signal will be converted, a first output for indicating whether or not there is any activity in the first channel, and a second output for transmitting data extracted from the input signal in a format selected using the second control input. Due to differences in voltage levels or operating speeds between the signals that may be processed by the first channel, five different input configurations are used.
The second channel, which processes T
1
and E
1
signals, includes an input for receiving an input signal or a test signal, a control input for selecting the type of output format to which the input signal will be converted, a first output for indicating whether or not there is any activity in the second channel, a second output for transmitting data extracted from the input signal in a format selected using the control input, and a third output for transmitting a clock signal extracted from the input signal in a format selected using the control signal.
The third channel, which processes T
2
, E
2
, T
1
C, T
3
, E
3
, and STM-
1
signals, includes an input for receiving an input signal or a test signal, a control input for selecting the type of output format to which the input signal will be converted, a first output for indicating whether or not there is any activity in the third channel, a second output for transmitting data extracted from the input signal in a format selected using the control input, and a third output for transmitting a clock signal extracted from the input signal in a format selected using the control signal.
The fourth channel, which processes E
4
, CMI, OC
3
, and electronic versions of fiber optic signals, includes an input for receiving an input signal or a test signal, a control input for selecting the type of output format to which the input signal will be converted, a first output for indicating whether or not there is any activity in the fourth channel, at least one second output for transmitting data extracted from the input signal in a format selected using the control input, at least one third output for transmitting a clock signal extracted from the input signal in a format selected using the control signal, and at least one fourth output at which appears a copy of the input signal as received.
For performing periodic self-testing, the present invention includes a controller, a multiplexer, a demultiplexer, and a comparator array.
Each first channel includes a comparator, an activity detector, an inverter, and a driver circuit. The comparator inputs for each first channel are configured for the type of signal received thereby.
Each second channel includes a transformer, a digitizer, an activity detector, a decoder, a framer, a clock and data recovery circuit, a first driver circuit, and a second driver circuit.
Each third channel includes a transformer, a digitizer, an activity detector, a decoder, a clock and data recovery circuit, a first driver circuit, and a second driver circuit.
Each fourth channel includes a transformer, a fanout circuit, a digitizer, a serial-to-parallel converter, a decoder, a clock and data recovery circuit, and a driver
Morelli Robert D.
Nguyen John B
The United States of America as represented by the National Secu
Young Brian
LandOfFree
Device for converting multiple signal types to NRZ format... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device for converting multiple signal types to NRZ format..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device for converting multiple signal types to NRZ format... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2514416