Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2009-11-16
2011-10-11
Mai, Son (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
C365S052000, C711S005000, C711S103000
Reexamination Certificate
active
08036012
ABSTRACT:
A memory device includes an array of memory modules, a global controller, and a local controller for each memory module in the array of memory modules being configured to deliver to the global controller an activity signal reflecting an activity of the respective memory module. The memory device includes a circuit configured to implement a NAND logic function based upon the activity signals and to output a control signal to the global controller based upon the NAND logic function.
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Goncalves Christophe
Lachaud Claire-Marie
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Jorgenson Lisa K.
Mai Son
STMicroelectronics (Crolles 2) SAS
STMicroelectronics (Rousset) SAS
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