Device for attenuating parasitic voltages

Electricity: power supply or regulation systems – Output level responsive – Using a transformer or inductor as the final control device

Reexamination Certificate

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Details

C323S251000, C323S255000, C323S362000

Reexamination Certificate

active

06483279

ABSTRACT:

The invention relates to a device for attenuating parasitic voltages with a magnetic core and at least one reactance coil with multiple windings wound around said magnetic core.
Such devices are generally known and are used, for instance, to suppress the storage of parasitic voltages in mains power lines through power consumers. Effective attenuation requires the choke to obtain as high an impedance as possible over as wide a frequency range as possible.
Based on this present state of the art the goal of the invention is to create a device for attenuating parasitic voltages with high impedance over a defined broad frequency range.
This goal is achieved by the invention in that along the length of each reactance coil closely wound winding sections alternate with broadly wound winding sections.
Since each reactance coil contains closely wound winding sections, the overall number of windings is high, yielding a high inductance value for the device. On the other hand the capacitance of the reactance coil is determined by the broadly wound winding sections, yielding overall a low capacitance value for each reactance coil. The consequence of both is that resonances arising from inductance and capacitance have a large bandwidth and a high peak value for impedance. Appropriate adjustment of the dimensions makes it possible to set the resonance frequencies of the device to values at which the parasitic signal spectrum shows peak levels and hence to optimize suppression of the parasitic signals.
Further design examples and advantageous constructions are given in the subordinate claims.


REFERENCES:
patent: 5619174 (1997-04-01), Tsuyoshi et al.
patent: 5635828 (1997-06-01), Yoshizawa et al.
patent: 5751207 (1998-05-01), Poess
patent: 6031341 (2000-02-01), Yoshizawa et al.
patent: 3112296 (1982-10-01), None
patent: 3220737 (1983-12-01), None
patent: 0635853 (1995-01-01), None
patent: 512760 (1939-10-01), None
Patent Abstracts of Japan, vol. 015, No. 040 (E-1028), Jan. 30, 1981.
Japanese Patent Abstract 02-277203, Nov. 13, 1990.

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