Facsimile and static presentation processing – Facsimile – Recording apparatus
Patent
1984-10-22
1987-08-04
Hix, L. T.
Facsimile and static presentation processing
Facsimile
Recording apparatus
358212, 358133, H04N 312
Patent
active
046849912
DESCRIPTION:
BRIEF SUMMARY
The present invention relates to a device for an array of photo diodes arranged in a matrix, which are integrated to the same semi-condutor substrate as a picture processor connected to the photo diodes, where the picture processor is of a type allowing parallel signal processing, such as picture transformation of the picture signals coming from the photo diodes.
Computerized picture processing had already been introduced in the sixties but it is only during recent years that it has become industrially interesting as equipment and algorithms have reached a sufficient level of maturity. This kind of picture processing has so far been realized in discrete systems where a TV camera and a computer have been the basic components.
To reach a more efficient usage of this technique the inventors at the Tenth Nordic Semi-conductor Convention, June 1982, have suggested an integrated solution including a camera in the form of a photo diode matrix as well as a picture processor. Such a picture processor is characterized by a high parallellism and therefore performs rapid operations on pictures.
This kind of system has so far only been inplemented as prototypes. When using these it has become obvious that the efficiency which is desired by the integration is jeopardized because the picture processing result cannot be extracted rapidly and efficiently from the circuit. One of the drawbacks is that a resulting picture must be read out from the circuit as this picture generally is the base for following, numerical calculations. As the number of connections to the circuit is considerably less than the number of picture elements this read out must take place serially which eliminates some of the speed advantage of the fast picture processor.
This invention aims to cure this disadvantage and this is achieved in that the device includes a digital circuit of a combinatorial or sequential type connected to the processor and designed to determine the number and/or the position of the picture elements which the photo diodes and the picture processor have established to fulfil a digital criterion.
The invention reduces the need to read out picture data by providing highly compressed information which can be brought out easily and be used for further processing.
In the following the invention will be explained further referring to the enclosed drawing where:
FIG. 1 shows a block chart of a device according to the invention integrated onto a single semi-conductor substrate.
FIG. 2 shows a preferred embodiment of a digital circuit according to a special characteristic of the invention.
FIG. 3 shows a preferred embodiment of a circuit block included in the invention.
In FIG. 1, 1 represents a diode matrix consisting of a number of photo diodes (PD), which via a data bus 2 is connected to a picture processor 3 with as many channels as the number of photo diodes in the matrix. Although it is not clearly spelt out, it is obvious that all signals are transformed into digital form to be able to be received and processed by the picture processor. The photo diode matrix 1 and the picture processor 3 are arranged on a common semi-conductor substrate using established semi-conductor technology and the picture processor is of the previously said type and capable of performing parallel picture processing operations.
Such a picture processor 3 includes an array of picture registers (P.sub.n) 5, a global logical unit (GLU) 6, a neighbourhood logical unit (NLU) 7, a point logical unit (PLU) 8, and an accumulator register (A) 9. The picture registers 5 are communicating via the bus 2 with one of the inputs of the GLU 6 and with the output 10 of the accumulator register 9. Said output is also connected to the other input of the GLU 6 and to one input of the PLU 8. The output of the GLU 6 is connected to the input of the NLU 7 and the output of this unit is connected to the other input of the PLU 8. The output of the PLU 8 is in turn connected to the input of the accumulator register. The GLU 6 is arranged to mark out such objects of a picture deliver
REFERENCES:
patent: 4503467 (1985-03-01), Ida et al.
patent: 4543660 (1985-09-01), Maeda
dmark Anders
Forchheimer Robert
Gray David M.
Hix L. T,.
LandOfFree
Device for an array of photo diodes arranged in a matrix does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device for an array of photo diodes arranged in a matrix, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device for an array of photo diodes arranged in a matrix will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-886787