Device comprising thermally stable, low dielectric constant...

Details Device comprising thermally stable, low dielectric constant... Device comprising thermally stable, low dielectric constant...

1999-04-21

2002-10-22

Lee, Eddie (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S752000, C257S759000, C257S642000, C257S637000

Reexamination Certificate

active

06469390

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the use of low dielectric constant (&kgr;) materials for device fabrication, in particular ultra-large scale integration (ULSI) devices.
2. Discussion of the Related Art
For semiconductor devices, packing densities quadruple, and minimum circuit dimensions shrink by 70%, about every three years. The design rules for such packing density and circuit dimension require an increase in the number of metal interconnect levels and the reduction of metal pitch (i.e., the linewidth and spacing between adjacent metal lines). However, tightening the metal pitch design rule increases both the line resistance and the capacitance between metal lines. Specifically, a large portion of the capacitive coupling is found in the back-end structure—between metal interconnects on the same level and between metal interconnects on different levels. The resulting increase in resistance-capacitance (RC) coupling undesirably increases propagation delay, increases cross-talk noise and increases power dissipation. Moreover, this capacitance is even more problematic because the metal height generally cannot be scaled down with the width due to reliability concerns.
As a result of these problems, low dielectric constant (i.e., low &kgr;) materials have been widely proposed and designed for use in back-end multi-level interconnect architecture, to reduce such interlayer and intralayer capacitance. See, e.g.,
MRS Symposium Proceedings on Low Dielectric Constant Materials
, Vols, 381, 443, 476, 511, 1995-1998;
MRS Bulletin on Low Dielectric Constant Materials
, Vol. 22 (1997); P. Singer, “Low &kgr; dielectrics: the search continues,”
Semiconductor International,
88 (May 1996); L. Peters, “Pursuing the perfect low-&kgr; dielectric,”
Semiconductor International,
64 (September 1998). These back-end low &kgr; materials have been useful in reducing undesired capacitance, but improved materials and techniques for improving the properties of shrinking devices are continually desired.
SUMMARY OF THE INVENTION
It has been discovered that, in addition to the capacitive coupling arising from the back-end structure, there is substantial capacitive coupling in the front-end structure of semiconductor devices. By providing low &kgr; material capable of withstanding the harsher requirements of front-end fabrication, significant performance enhancement is attained. (The front-end structure, as known in the art, is the structure from and including the device substrate up to the first metal interconnect level (metal-1); the back-end structure is the structure including the first metal interconnect layer and above).
A typical semiconductor device according to the invention, reflected in
FIG. 1
, includes a substrate
12
, an isolation structure in the substrate (e.g., shallow trench isolation
10
), an active device structure (e.g., a transistor structure
14
,
16
,
18
,
19
,
20
), a dielectric layer
26
over the active device structure, and a metal interconnect layer
28
over the dielectric layer (metal-1 level). At least one of the isolation structure 10 and the dielectric layer
26
—which are dielectric material components in the front-end structure—comprise a material exhibiting a dielectric constant less than 3.5. This relatively low dielectric constant provides improved properties in the overall device by reducing capacitive coupling in the front-end.
It is not possible, however, to simply use low &kgr; materials designed for a back-end structure. Low &kgr; materials suitable for integration in the front-end structure must meet a different set of physical and chemical requirements. In particular, the thermal stability requirement for front-end low &kgr; materials is much higher, typically at least 700° C., and as high as 1000° C. By contrast, typical back-end low &kgr; materials such as organic or inorganic polymers generally are designed to endure only relatively low temperatures, e.g., up to 425° C., and will not withstand front-end processing temperatures. In one embodiment of the invention, therefore, a high thermal stability porous silica is used to provide a dielectric constant less than 3.5, advantageously less than 3.0, in the front-end structure of semiconductor devices. The silica is capable of exhibiting a thermal stability of at least 700° C., optionally at least 1000° C. (Thermal stability indicates less than 5 wt.% loss at the noted temperature.)


REFERENCES:
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patent: 5470802 (1995-11-01), Gnade et al.
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patent: 5751056 (1998-05-01), Numata
patent: 5751066 (1998-05-01), Havemann
MRS Symposium Proceedings on Low Dielectric Constant Materials,vols. 381, 443, 476, 511, (1995-1998).
MRS Bulletin on Low Dielectric Constant Materials,vol. 22, (1997).
P. Singer, “Low k dielectircs: the search continues,”Semiconductor International,64 (1998).
L. Peters, “Pursuing the perfect low-k dielectric”,Semiconductor International,64 (1998).
T. Ramos et al., “Nanoporous silica for low k dielectrics,”MRS. Symp. Proceedings on Low Dielectric Constant Materials,vol. 443, 91 (1997).
E. D. Birdsell, et al., “Porous silica: a potential material for low dielectric constant applications,”MRS Symp. Proceedings on Low Dielectric Constant Materials,vol. 511, 111 (1998).
L.W. Hurbesh, et al., “Processing and characterization of high porosity aerogel films,”MRS. Symp. Proceedings on Advances in Porous Materials,vol. 371, 195 (1995).

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