Device and method for testing integrated circuits

Details Device and method for testing integrated circuits Device and method for testing integrated circuits

2006-05-29

2011-10-04

Patel, Paresh (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S762010

Reexamination Certificate

active

08030953

ABSTRACT:
A method and device for testing an integrated circuit. The method includes selecting between a shadow latch data retention mode and a shadow latch test mode; performing a first test of an integrated circuit; storing, at the shadow latch if the shadow latch test mode is selected, information representative of a first test-imposed state; performing a second test of the integrated circuit; and generating a test equipment detectable signal if the first test-imposed state differs from a second test-imposed state of the tested latch.

REFERENCES:
patent: 4244048 (1981-01-01), Tsui
patent: 5016220 (1991-05-01), Yamagata
patent: 2002/0190742 (2002-12-01), Ooishi
patent: 2004/0051574 (2004-03-01), Ko et al.
patent: 2004/0181724 (2004-09-01), McBride
International Search Report correlating to PCT/IB2006/051700, WO 2007/138387 A1, dated Feb. 14, 2007.

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