Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
1998-10-14
2001-09-11
Shah, Kamini (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C702S066000, C714S724000, C714S734000, C714S739000
Reexamination Certificate
active
06289293
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 87110437, filed Jun. 29, 1998, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention generally relates to testing technology for a tester, and more particularly to a device and method for testing multiple input-output ports.
2. Description of Related Art
Conventional testers can only test a fixed number of input-output (IO) ports, for example, 32 or 64 I/O ports at one time, limiting the testing capacity for a large-size memory. As shown in
FIG. 1
, which shows a conventional method for testing I/O ports, in which corresponding relationship between the I/O ports of a device under test and probes is one-to-one. Also, probe card
10
is directly connected to device under test (DUT) card
20
via I/O ports IO
0
, IO
1
, . . . , IO
31
.
When the number of I/O ports of a device under testing is larger than 32, for example, 64, two tests are required for the tester to complete an I/O testing. It therefore causes time delay in the manufacturing process of electronic devices, if the number of I/O ports under testing is larger than the capacity that the tester can provide.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a device and method to complete a testing for all the I/O ports at one time without limiting the number of the I/O ports of an electronic device under testing.
In accordance with the foregoing and other objectives of the present invention, a device and method for testing the I/O ports are provided, which will be described in detail hereinafter.
There are a plurality of switching devices and a decoder employed between the probe card and the DUT card. Every switching device possesses an identical number of input ports and output ports to that of the testing I/O ports of the DUT card. Every testing I/O port of the DUT card is connected to the corresponding output ports of every switching device.
The decoder is used to select a switching device, of which the output ports are connected to the DUT card for testing. The testing capacity can therefore be increased by 4 times if a 2-to-4 decoder in a tester is used Assume that a DUT card can only test 32 I/O ports at one time. The testing capacity can be 4 times as large, i.e. 128 I/O ports, if the tester is used.
In addition, the switching device is consisted of a plurality of complementary MOS (CMOS) transistors acting as switches between the output of the probe card and the testing I/O ports of t he DUT card. Inputs to the decoder are defined within the DUT card so as to determine the address at which a switch having 32 I/O ports is selected for testing.
REFERENCES:
patent: 4870346 (1989-09-01), Mydill et al.
Huang Jiawei
J.C. Patents
Shah Kamini
United Microelectronics Corp.
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