Electricity: power supply or regulation systems – Input level responsive – Using a linearly acting final control device
Reexamination Certificate
2002-10-18
2004-08-10
Nguyen, Matthew V. (Department: 2838)
Electricity: power supply or regulation systems
Input level responsive
Using a linearly acting final control device
C323S273000
Reexamination Certificate
active
06774612
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to DC/DC converters and their use in electronic systems. More particularly, the present invention relates to reducing the initial set-point error of a DC/DC converter and expanding the margining window for electronic devices tested when powered by DC/DC converters.
BACKGROUND OF THE INVENTION
Direct current-to-direct current (DC/DC) converters are commonly used in electronic devices and systems. The principal function of a DC/DC converter is to translate a readily available voltage source to an output voltage required by a specific load. For example, in a communications application, a telephone central office battery supply voltage of 48 volts may be converted to 3.3 volts for powering a conventional integrated circuit.
FIG. 1
shows a common DC/DC converter
10
that translates a DC input voltage VIN into a DC output voltage VOUT, which has a voltage level that is less than the voltage level of the input voltage VIN. This type of DC/DC converter is commonly referred to in the art as a “buck” converter. The DC input voltage VIN supplied to buck converter
10
is periodically coupled to an inductor
102
and a diode
104
, by operation of a switching transistor
100
. Inductor
102
is also connected to a capacitor
106
and a load
108
. Switching transistor
100
is controlled by a pulse width modulator (PWM)
110
, which provides an alternating control signal to the gate of switching transistor
100
. This alternating control signal alternately turns switching transistor
100
on and off, thereby alternately coupling and decoupling the input voltage VIN to and from converter
10
.
When switching transistor
100
is turned on by the alternating control signal, current from the source of input voltage VIN is directed toward inductor
102
and diode
104
. Due to the orientation of diode
104
, however, the current is blocked from passing to ground and, instead, flows and increases linearly through inductor
102
to charge capacitor
106
and power load
108
. When transistor switch
100
is turned off by the alternating control signal, VIN is decoupled from inductor
102
and diode
104
. However, the current through inductor
102
continues to flow, since current through an inductor cannot decrease instantaneously to zero. Because of the decoupling of VIN from the converter, however, the inductor current does decrease, albeit at a linear fashion, flowing through the loop formed by inductor
102
, the parallel combination of capacitor
106
and load
108
, and diode
104
. The alternate coupling of VIN to and from converter
10
results in an inductor current that is triangular in shape. The triangular-shaped inductor current is filtered by the combination of inductor
102
and capacitor
106
to remove the triangular shape and thereby provide the intended flat DC output voltage VOUT.
As might be expected, the voltage level of DC output voltage VOUT depends on how long switching transistor
100
is turned on compared to how long it is turned off. In fact, it can be shown that the average voltage level of VOUT for a converter, like the one shown in
FIG. 1
, is directly proportional to the duty cycle of the alternating control signal, which controls the on/off time of switching transistor
100
. (The duty cycle D of a periodic waveform is the fraction of the period of the waveform during which the waveform is high.)
The voltage level of DC output voltage VOUT is dynamically monitored and adjusted in the converter
10
to encourage the voltage level of DC output voltage VOUT to be constant over time. As shown in
FIG. 1
, this is typically carried out by coupling VOUT to an error amplifier
112
, via a voltage divider comprising a first resistor
114
and a second resistor
116
, and comparing it to a reference voltage VREF. Accordingly, when the voltage at node
118
falls below VREF, indicating that VOUT is too low, error amplifier
112
provides an error signal to PWM
110
causing PWM
110
to increase the duty cycle D of the alternating control signal. On the other hand, when the voltage at node
118
rises above VREF, indicating that VOUT is too high, error amplifier
112
provides an error signal to PWM
110
causing PWM
110
to decrease the duty cycle D of the alternating control signal.
Ideally, the buck converter
10
in
FIG. 1
provides an output voltage VOUT that is immune to changes in load conditions, has no AC component and maintains a constant DC level over time. In practice, however, a DC/DC converter does not provide these desirable attributes, as various internal and external factors affect the accuracy of the output. Performance limitations attributable to these factors are often characterized and published in a data sheet accompanying the converter. One of these performance limitations is characterized and expressed as the error in the “initial set-point”. The initial set-point is the intended or designed output voltage level of a given DC/DC converter design under specified load conditions. The actual output voltage level may, and often does, differ from the initial set-point, due to inaccuracies of components used to build the converter. In particular, in the DC/DC converter
10
shown in
FIG. 1
, the voltage divider formed by resistors
114
and
116
provides a divided voltage that differs from an intended voltage due to inaccuracies in the resistances of the resistors forming the voltage divider. Additionally, in the same design, the actual output voltage level of one converter often differs from the actual output voltage of another due to deviations in intended resistance values of the resistors used in one converter compared to the next. Other factors that contribute to the initial set-point error include variations in the reference voltage VREF, the inability of error amplifier
112
to maintain its intended output voltage under different input voltages (line regulation) and output currents (load regulation). The guaranteed maximum range of variation between the intended output voltage and the initial set-point is normally published in an accompanying data sheet and is referred to as the “initial set-point error.” A typical initial set-point error is +/−2-3%.
DC/DC converters are often employed to supply power to a system comprised of integrated circuits and other electrical and electronic components. A system is designed so that it is guaranteed to function properly when powered within a tolerable supply range defined by upper and lower supply limits (or “margins”). To ensure that the system does in fact function properly within the tolerable supply range, “margining” tests are typically performed to test the functionality of components of the system when powered at these supply range margins. The margining tests allow a tester to isolate and screen out those components that malfunction when the system is powered at the supply margins.
A typical margining test set-up
20
for performing margining tests is shown in
FIG. 2. A
tester
200
, as controlled by a workstation
202
, is programmed to provide test input vectors
204
to a device under test (DUT)
206
, which is assumed here to be a digital device (e.g. an ASIC) for purposes of example. Test input vectors
204
typically comprise a predetermined pattern of digital bits, which are sent to DUT
206
. DUT
206
operates on test input vectors
204
and provides one or more test result vectors
208
. Tester
200
is configured to receive test result vectors
208
from DUT
206
and compare them to a set of expected results. A DC/DC converter
210
, which supplies power to test set-up
20
, includes an output terminal VOUT, which supplies a DC output voltage, a ground terminal GND, which is coupled to ground, and a trim input TRIM. As shown in
FIG. 2
, testing the functionality of DUT
206
at the supply margins is typically performed by coupling a first end of a trim resistor
212
, having a resistance value specified by the converter data sheet, to trim input TRIM and coupling a second end of trim resistor
212
alternately, be
Ballenger Robert
Seto Kan Chiu
Cisco Technology Inc.
Nguyen Matthew V.
Thelen Reid & Priest LLP
Winters William E.
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