Device and method for processing digital values in...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S493000

Reexamination Certificate

active

07433905

ABSTRACT:
A table establishes correspondence between first sets of at least one number, expressed in accordance with a signed code where each number may have the value of 0, 1 or −1, and second sets of at least one number, expressed according to a simple form where each number may have the value 0 or 1. An input sequence of numbers is decomposed into sets of numbers present in the correspondence table. For each set of numbers derived from the decomposition, a corresponding set of numbers is given by the correspondence table. A sequence of numbers is compiled from the sets retrieved from the table. The invention is in particular useful in various algorithms, such as in cryptography, for example to store values in signed binary mode, in compact non-adjacent form with only the numbers 0, 1 and/or for rapidly producing random numbers in the non-adjacent form.

REFERENCES:
patent: 5170371 (1992-12-01), Darley
patent: 5570309 (1996-10-01), Miyoshi et al.
patent: 5815420 (1998-09-01), Steiss
patent: 5907499 (1999-05-01), Suzuki
patent: 0933695 (1999-08-01), None
Srinivas et al., “High-Speed VLSI Arithmetic Processor Architectures using Hybrid Number Representation”, Proceedings of the International Conference on Computer Design-VLSI in Computers and Processors, Cambridge, MA, Oct. 14-16, 1991 Los Alamitos, IEEE Comp. Soc. Press, US, p. 564-571.
Chin-Long Wey et al., “A Self-Timed Redundant-Binary Number to Binary Number Converter for digital Arithmetic Processors”, Computer Design: VLSI in Computers and Processors, 1995 ICCD 1995, Proceedings, 1995 IEEE International Conference, p. 386-391, Austin, Texas, US.
Herrfeld A. et al., “Conversion of Redundant Binary into Two's Complement Representations”, Electronic Letters, IEE Stevenage, GB, 1995, vol. 13, No. 14.
Joye, J. et al., “Optimal left-to-Right Binary Signed-Digit Recording” IEEE Transactions on Electronic Computers, IEE Inc., New York, US, 2000, vol. 49, No. 7.
Koyama , K. et al., Speeding Up Elliptic Cryptosystems By Using A Signed Binary Window Method:, Advances in Cryptology—Annual International Cryptology Conference, , Proceedings, Springer-Verlag, XX, vol. 40, 1993, p. 345-357.

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