Device and method for performing a cryptoalgorithm

Cryptography – Communication system using cryptography – Time segment interchange

Reexamination Certificate

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C380S028000, C380S030000, C380S033000, C380S044000, C380S046000, C380S255000, C380S277000, C713S155000, C713S165000, C713S189000, C713S191000, C708S252000, C708S255000, C708S500000, C331S078000, C326S038000, C326S039000

Reexamination Certificate

active

08005212

ABSTRACT:
A device for executing a cryptoalgorithm including a central processing unit for a first sub-group of operations and for a flow control of the cryptoalgorithm as well as a hardware circuit for a second sub-group of operations, wherein the first sub-group preferably includes arithmetic and/or logic operations, while the second sub-group includes rotation operations, permutation operations, substitution operations or selection operations.

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patent: 2002/0106080 (2002-08-01), Qi et al.
Phillips B J et al.; “Implementing 1,024-bit RSA Exponentiation on a 32-bit Processor Core”; IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '00), Jul. 10, 2000, pp. 127-137.
Menezes, A.J. et al.; “Handbook of Applied Cryptography”; ISBN 0-8493-8523-7, pp. 612-613, Printed Published 1997.

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