Pulse or digital communications – Systems using alternating or pulsating current – Plural channels for transmission of a single pulse train
Reexamination Certificate
2000-05-04
2004-06-29
Chin, Stephen (Department: 2734)
Pulse or digital communications
Systems using alternating or pulsating current
Plural channels for transmission of a single pulse train
C375S326000, C329S308000, C329S325000, C329S360000, C455S147000, C455S214000, C455S326000
Reexamination Certificate
active
06757336
ABSTRACT:
FIELD OF THE INVENTION
A device and method for performing a carrier recovery and especially a device and method for performing carrier recovery by calculating a sine and a cosine of a correction angle and rotating a received signal accordingly.
BACKGROUND OF THE INVENTION
Modems enable information to be transferred over telephone lines or other communication links. A carrier signal is modulated by information and is sent, via a path, from a transmitting modem to a receiving modem. A common method of modulation is the PAM in which both the phase and the amplitude of the carrier signal are modulated. Each modem is characterized by a group of allowable transmitted symbols. This group is commonly known as a constellation.
The carrier signal is generated by a signal generator within the transmitting modem, while the receiving modem has another signal generator, that generates a carrier recovery signal that has a slightly different frequency than the carrier frequency. The frequency variations are compensated by carrier recovery systems.
A prior art carrier recovery circuits comprise of a multiplexer, a decision unit that maps a signal inputted to it to a symbols of the constellation, an angle difference detector that measures the angular difference between the inputted signal and the symbol; a loop filter that receives the difference and provides an error signal to a complex voltage controlled oscillator VCO, the complex VCO provides a shift signal to be provided to the multiplexing unit so that a signal that is inputted to the multiplexer is phase shifted.
A prior art carrier recovery system
10
is shown in FIG.
1
. System
10
comprising: multipliers
34
,
36
,
38
,
42
,
44
and
48
, adders
32
,
40
,
46
and
50
, decision unit
14
, delay unit
52
and sine and cosine calculator
62
. A multiplying unit
12
is comprised of multipliers
30
,
34
,
36
,
38
and adders
32
and
40
.
Multiplying unit
12
receives a real part of a received signal RE(Xk) and an imaginary part of a received signal IM(Xk) and multiplies them by an estimation of the phase shift provided by sine and cosine calculator
62
. A real and imaginary parts of the product RE(Qk) and IM(Qk) are provided to decision unit
14
. Decision unit
14
maps Qk to a symbol of the constellation Ak. A real part RE(Ak) and an imaginary part IM(Ak) of Ak, RE(Qk) and IM(Qk) are provided to multipliers
42
and
44
and adder
46
to produce an error signal EPk. Error signal EPk is passed through a loop filter comprising of multiplier
48
adder
50
and delay unit
52
to produce a normalized error signal EPNk. EPNk is provided to sine and cosine calculator
62
which receives EPNk provides it to an integrating circuit within sine and cosine calculator
62
. The integrating circuit outputs a correction angle &thgr;k that reflects an angular difference between Ak and Xk, calculates the sine and cosine COS(&thgr;k) and SIN(&thgr;k) of &thgr;k and provides them to multiplying unit
12
in a manner that rotates a next signal Xk+1 by &thgr;k to produce Qk+1.
Multiplier
30
has two inputs and an output for receiving RE(Xk) and COS(&thgr;k−1) and providing a first product RES_
30
to adder
32
. Multiplier
38
has two inputs and an output for receiving IM(Xk) and COS(&thgr;k−1) and providing a fourth product RES_
38
to adder
40
. Multiplier
34
has two inputs and an output for receiving RE(Xk) and SIN(&thgr;k−1) and providing a second product RES_
34
to adder
40
. Multiplier
36
has two inputs and an output for receiving IM(Xk) and SIN(&thgr;k−1) and providing a third product RES_
36
to adder
32
. Adder
32
has two inputs and an output for receiving RES_
36
and RES_
30
and provide RE(Qk) to decision unit
14
and to multiplier
44
. Adder
40
has two inputs and an output for receiving RES_
38
and RES_
34
and providing a IM(Qk) to multiplier
42
and to decision unit
14
. Decision unit
14
outputs RE(Ak) and provides it to multiplier
42
. Decision unit
14
outputs IM(Ak) and provides it to multiplier
44
. Multiplier
42
receives RE(Qk) and IM(Ak) and provides a fifth product RES_
42
. Multiplier
44
receives IM(Qk) and RE(Ak) and provides a sixth product RES_
44
. Adder
46
subtracts RES_
44
from RES_
42
and provides error signal EPk.
Correction angle &thgr;k ranges between 0 to 2&pgr;. Prior art sine and cosine unit
64
, either implemented in software or hardware, calculated COS (&thgr;k) and SIN(&thgr;k) by either a look up table or by calculating a Taylor series representing either COS (&thgr;k) and SIN(&thgr;k). Both solutions offered a relatively poor compromise between accuracy and either complexity or memory space. For example, if the system is implemented by a 16 -bit processor, the table will have to up till 2
16
entries to provide an accuracy of &pgr;/2
16
degrees, which is not good enough.
There is a need to provide an improved device and method for performing carrier recovery, so that the calculation of a sine and a cosine of a correction angle is both accurate and simple.
REFERENCES:
patent: 4344176 (1982-08-01), Qureshi
patent: 5228060 (1993-07-01), Uchiyama
patent: 5940450 (1999-08-01), Koslov et al.
patent: 6009132 (1999-12-01), Scholtz
patent: 6307898 (2001-10-01), Ido
patent: 6430243 (2002-08-01), White
Elgart Vladislav
Moscovici Avishay
Naor Gideon
Chin Stephen
Freescale Semiconductor Inc.
Ha Dac V.
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