Device and method for parallelizing compilation optimizing data

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395709, 395705, 395800, G06F 930, G06F 945

Patent

active

056340591

ABSTRACT:
The present invention relates to an optimizing compiler apparatus for converting a source program into an object program for use by a parallel computer, which optimizes the number of data transmissions between processing elements for a parallel computer made up of a plurality of processing elements, composed of a loop retrieval unit for retrieving the loop processes from a program, a data transmission calculation unit for calculating the data transmission count generated when each of the loop processes is parallelized, a parallelization determination unit for determining the loop to be parallelized as the loop, out of all the loops in a multiple loop, with the lowest data transmission count and a code generation unit for generating parallelized object code for the determined loop. The data transmission calculation unit is made up of a right side variable retrieval unit for retrieving the variables on the right side of an equation in the loop retrieved by the loop retrieval unit, a variable information storage unit for storing information relating to array variables which should be distributed among every processing element for the part of the program which comes before the loop retrieved by the loop retrieval unit and a calculation unit for calculating the data transmission count based on the variable information for the retrieved right side variable.

REFERENCES:
patent: 5067068 (1991-11-01), Iwasawa et al.
patent: 5088034 (1992-02-01), Ihara et al.
patent: 5146594 (1992-09-01), Iitsuka
patent: 5151991 (1992-09-01), Iwasawa et al.
patent: 5230053 (1993-07-01), Zaiki
patent: 5274812 (1993-12-01), Inoue
patent: 5317743 (1994-05-01), Imai et al.
patent: 5396631 (1995-03-01), Hayashi et al.
patent: 5437034 (1995-07-01), Tanaka et al.
"Advanced Compiler Optimizations for Supercomputers", by d. Padua et al., Communications of the ACM, Dec. 1986, vol. 29, No. 12.
Annaratone, M et al "Balancing Interprocessor Communication and Computation on Torus-Connected Multicomputers Running Compiler-Parallelized Code", Apr. 1992, IEEE Compt. Soc. Press, pp. 358-365.
Banerjee, D et al, "An Optimizing Compiler for FP*-A Data-Parallel Dialect of FP", Nov. 1991, IEEE Compt. Soc. Press, pp. 70-78.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Device and method for parallelizing compilation optimizing data does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device and method for parallelizing compilation optimizing data , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device and method for parallelizing compilation optimizing data will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2336309

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.