Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
1999-03-03
2002-03-26
Kelley, Chris (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C382S240000
Reexamination Certificate
active
06363119
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to a technique for compressing images (image signals), and in particular, to hierarchical image coding/decoding devices and hierarchical image coding/decoding methods by which lossless decoding of coded images is realized.
DESCRIPTION OF RELATED ARTS
As a reversible image coding method, the present inventor has recently proposed a technique in Japanese Patent Application Laid-Open No.HEI10-108186 (published Apr. 24, 1998): “Transform Coding Method for Digital Signals enabling Reversible Transformation.” The technique is a reversible image coding method based on discrete cosine transform (DCT), and enables reversible coding by improving an ordinary coding method which employs discrete cosine transform. A reversible image coding method can also be constructed by applying the above technique to an MPEG-2 (Moving Picture Experts Group-Phase 2) coding method.
By combining the above reversible image coding method and the MPEG-2 SNR scalability together, a reversible hierarchical coding method can be constructed, as we mentioned in R. Oami and M. Ohta “A Study on Hierarchical Coding with Lossless DCT,” The Proceedings of the 12th Picture Coding Symposium of Japan, pages 107-108 (October 1997). By the reversible hierarchical coding method, two layer bit-streams, a base layer bit-stream and an enhancement layer bit-stream, are generated. The base layer bit-stream can be decoded with an ordinary MPEG-2 decoder. The enhancement layer bit-stream is a bit-stream for complementing the base layer bit-stream. A lossless decoded image which is exactly the same as the original image can be obtained by decoding the base layer bit-stream and the enhancement layer bit-stream using inverse transformation of the reversible discrete cosine transform described in the Japanese Patent Application Laid-Open No.HEI10-108186 (published Apr. 24, 1998).
FIG. 1
is a circuit diagram showing an example of a hierarchical image coding device which is realized by employing the MPEG-2 SNR scalability and the reversible discrete cosine transform proposed by the present inventors. Referring to
FIG. 1
, the hierarchical image coding device comprises a quantization control section
3
, a quantizer
4
, an inverse quantizer (de-quantizer)
5
, a motion estimation/compensation circuit (ME/MC)
50
, a reversible discrete cosine transform circuit (RDCT) (lossless discrete cosine transform circuit (LDCT))
51
, code conversion sections
14
and
52
subtracters
1
and
53
, and multiplexers
54
and
55
.
The motion estimation/compensation circuit
50
executes motion compensation to an input video signal (the original image signal), and thereby generates and outputs a motion compensated prediction image signal. At the same time, the motion estimation/compensation circuit
50
also outputs macro block information. The subtracter
1
subtracts the motion compensated prediction image signal outputted by the motion estimation/compensation circuit
50
from the input video signal (the original image signal), and thereby outputs a prediction error image signal. The reversible discrete cosine transform circuit
51
executes the reversible discrete cosine transform to the prediction error image signal outputted by the subtracter
1
, and thereby obtains transform coefficients of the reversible discrete cosine transform.
The quantization control section
3
determines and outputs a quantization scale on every macro block, based on the prediction error image signal outputted by the subtracter
1
and code quantity information of the base layer bit-stream outputted by the multiplexer
54
. The quantizer
4
quantizes the transform coefficients outputted by the reversible discrete cosine transform circuit
51
based on a quantization matrix, the quantization scale determined by the quantization control section
3
, and the macro block information outputted by the motion estimation/compensation circuit
50
, and thereby outputs the quantized values of the transform coefficients to the code conversion section
14
.
The code conversion section
14
encodes the quantized values outputted by the quantizer
4
into a variable length code based on the macro block information outputted by the motion estimation/compensation circuit
50
and a predetermined coding table, and thereby outputs the variable length code of the quantized values to the multiplexer
54
. The multiplexer
54
multiplexes the variable length code outputted by the code conversion section
14
, the quantization scale outputted by the quantization control section
3
, the macro block information outputted by the motion estimation/compensation circuit
50
, the quantization matrix and other additional information, and thereby generates and outputs the base layer bit-stream. The multiplexer
54
also outputs the code quantity information of the base layer bit-stream to the quantization control section
3
.
The inverse quantizer
5
inversely quantizes (de-quantizes) the quantized values outputted by the quantizer
4
, using the quantization matrix and the quantization scale and based on the macro block information outputted by the motion estimation/compensation circuit
50
, and outputs the inversely quantized values to the subtracter
53
. The subtracter
53
subtracts the inversely quantized values outputted by the inverse quantizer
5
from the transform coefficients outputted by the reversible discrete cosine transform circuit
51
, and thereby obtains coding residual values (coding residual signal). The code conversion section
52
encodes the coding residual values outputted by the subtracter
53
into a variable length code based on a predetermined coding table, and thereby outputs the variable length code of the coding residual values to the multiplexer
55
. The multiplexer
55
multiplexes the variable length code outputted by the code conversion section
52
and other additional information, and thereby generates and outputs the enhancement layer bit-stream.
Incidentally, while motion compensation is generally executed using a locally decoded image signal in ordinary MPEG-2 image coding devices, the image coding device of
FIG. 1
does not have such a component. That is because local decoding is unnecessary since a decoded image (an image signal after decoding) becomes exactly the same as the original image (the original image signal before coding) in the case where the reversible discrete cosine transform is employed instead of the ordinary discrete cosine transform.
FIG. 2
is a circuit diagram showing an example of a hierarchical image decoding device for decoding the video signal (image signal) which has been coded by the hierarchical image coding device of FIG.
1
. Referring to
FIG. 2
, the hierarchical image decoding device comprises demultiplexers
72
and
73
, code conversion sections
30
and
70
, an inverse quantizer (de-quantizer)
32
, adders
34
and
36
, a reversible discrete cosine inverse transform circuit (RDCIT)
71
, and a motion compensation circuit (MC)
37
.
The demultiplexer
72
demultiplexes the base layer bit-stream into the variable length code of the quantized values, the quantization scale, the macro block information, the quantization matrix and the additional information. The code conversion section
30
decodes the variable length code of the quantized values using the predetermined coding table, and thereby outputs the quantized values to the inverse quantizer
32
. The. inverse quantizer
32
executes inverse quantization (de-quantization), which is specified by the quantization scale, the macro block information and the quantization matrix outputted by the demultiplexer
72
, to the quantized values outputted by the code conversion section
30
, and thereby obtains the inversely quantized values.
The demultiplexer
73
demultiplexes the enhancement layer bit-stream into the variable length code of the coding residual values and the additional information. The code conversion section
70
decodes the variable length code of the coding residual values using
Kelley Chris
NEC Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Senfi B.
LandOfFree
Device and method for hierarchically coding/decoding images... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device and method for hierarchically coding/decoding images..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device and method for hierarchically coding/decoding images... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2837329