Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1999-01-05
2002-01-15
Wilczewski, Mary (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S680000, C257S700000, C257S720000
Reexamination Certificate
active
06339256
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to chip-on-board applications for integrated circuit dice, and in particular to devices and methods for electrically and thermally coupling to the backsides of dice in such applications.
2. State of the Art
Integrated circuit (IC) dice or “chips” are small, generally rectangular IC devices cut from semiconductor wafers, such as silicon wafers, on which multiple IC's have been fabricated. Most dice are packaged by attaching them to lead frames supported in plastic or ceramic packages, and the lead frames and packages are typically designed to conduct heat away from the dice in order to protect them from heat damage. Such packages are also typically designed to protect the dice from corrosion.
Some dice, however, are packaged in what are known as “chip-on-board” (COB) applications, in which the dice are directly attached to printed circuit boards (PCB's) or other known substrates using well-known die-attach techniques. In these applications, bond pads on one or more dice are connected to signal traces on the surfaces of PCB's or other substrates using wire, or tape-automated, bonding, and a liquid or gel encapsulant, commonly referred to as a “glob top,” is applied over the dice to protect them from corrosion. One such COB application is described in U.S. Pat. No. 5,497,027.
Dice in COB applications typically generate more heat than their associated PCB's alone can satisfactorily conduct away. Consequently, certain techniques have been devised to assist in conducting heat away from dice in COB applications. In one such technique shown in
FIG. 1
, circuit traces
10
that widen near a die
12
and are directly attached to the surface
14
of a PCB
16
assist the PCB
16
in conducting significant amounts of heat away from the die
12
. Unfortunately, circuit traces that widen sufficiently near dice to satisfactorily conduct heat away from the dice typically use an inordinately large amount of surface space on their associated PCB's. As a result, widened circuit traces can be difficult or impossible to implement in today's densely packed COB applications. Widened circuit traces can also lead to an undesirable increase in capacitive and inductive parasitics, which are highly undesirable for high-speed applications.
Another technique for conducting heat away from dice in COB applications involves using thermally conductive PCB's in place of the more commonly used glass-epoxy PCB's. Thermally conductive PCB's are made with materials such as insulated aluminum, porcelainized steel, and ceramics that are superior in heat transfer characteristics to glass-epoxy. Because this technique is not applicable to the glass-epoxy PCB's used in the majority of COB applications, it is of limited utility.
Therefore, there is a need in the art for a device and method for satisfactorily conducting heat away from dice that are directly attached to a variety of PCB's, including conventional, widely-utilized glass-epoxy PCB's, without degrading the electrical characteristics of the interconnecting circuitry in COB applications.
BRIEF SUMMARY OF THE INVENTION
An inventive device for chip-on-board applications comprises a base, such as a printed circuit board (PCB) or a multi-chip module, that includes a conductive layer, such as a copper or other metallic plane, positioned on a surface of a supporting insulative substrate. An insulating layer overlies the surface of the conductive layer and defines at least one aperture in substantial registry with a localized region on the conductive layer on which a bare integrated circuit die is to be placed. The backside surface of the die is directly attached to the conductive plane in the localized region using a conductive die-attach material, such as a silver-filled epoxy, interposed between the conductive layer and the die. The inventive device thus can advantageously conduct heat away from the die by directly coupling the backside of the die to the conductive layer through the conductive die-attach material. The device can also conduct a substrate bias voltage to the backside of the die through the conductive layer and the die-attach material.
In a modified version of the base described above, the base includes multiple vertically-separated conductive layers, each layer having a localized region for conductive attachment to one of multiple bare integrated circuit dice. As a result, each of the dice may receive a different substrate bias voltage through its respective conductive layer.
In another embodiment of the present invention, an electronic device includes the base described above and an integrated circuit die, such as a Dynamic Random Access Memory (DRAM) die. In still another embodiment, an electronic system includes input, output, memory, and processor devices, and one or more of these devices includes the base described above.
In a further embodiment, a system for conducting heat away from a die includes a thermally conductive interior PCB layer having a surface with an externally accessible die-attach region. A thermally conductive die-attach material directly attaches a backside surface of the die to the die-attach region to establish thermal conduction between the die and the thermally conductive layer.
In a still further embodiment of the present invention, a system for supplying a substrate bias voltage to a die includes a substrate bias voltage generator and an electrically conductive layer inside a PCB for conducting the substrate bias voltage to an externally accessible die-attach region on the surface of the conductive layer. An electrically conductive die-attach material directly attaches a backside surface of the die to the die-attach region to conduct the substrate bias voltage to the backside surface of the die.
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Goodwin David
TraskBritt
Wilczewski Mary
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