Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-06-03
2002-04-16
Lao, Lun-Yi (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S092000, C345S098000, C345S204000
Reexamination Certificate
active
06373459
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor liquid crystal display (TFT-LCD) and, more particularly, to a device and method for driving a dot inversion source of a TFT-LCD.
2. Background of the Related Art
TFT-LCDs are widely used in monitors, TVs and the like, which require high picture quality. Generally, a dot inversion driving method has been used in the TFT-LCDs to obtain high picture quality. The dot inversion driving method requires the use of a high voltage of 10-12V in a circuit for driving a source, and the use of a high voltage device positioned at an output terminal or the use of a special circuit method to realize a typical CMOS process.
A conventional dot inversion circuit for driving a TFT-LCD will be described with reference to
FIGS. 1 and 2
.
FIG. 1
is a schematic view illustrating a conventional circuit for driving a TFT-LCD and
FIG. 2
is a schematic view illustrating an output buffer unit of the circuit shown in FIG.
1
.
As shown in
FIG. 1
, the conventional circuit
50
for driving a TFT-LCD includes a first level shift unit
1
for shifting picture data V
SS
−V
DD
indicative of gray level to picture data V
SS2
−V
DD2
of certain levels, a first digital-to-analog (D/A) converter
2
for converting the signals output from the first level shift unit
1
to an analog picture signal of positive (+) polarity, a first sample and hold (S/H) unit
3
for sampling and holding the output of the first D/A converter
2
, a second level shift unit
4
for shifting picture data V
SS
−V
DD
indicative of gray level to picture data V
SS1
−V
DD1
of certain levels, a second D/A converter
5
for converting the signals output from the second level shift unit
4
to an analog picture signal of positive (+) polarity, a second S/H unit
6
for sampling and holding the output of the second D/A converter
5
, a third level shift unit
7
for shifting externally applied polarity (+, −) signals V
SS
−V
DD
to certain signal level data V
SS2
−V
DD2
and outputting a first enable signal ENS
1
of high level, a fourth level shift unit
8
for shifting externally applied polarity (+,−) signals V
SS
−V
DD
to certain signal level data V
SS1
−V
DD1
and outputting a second enable signal ENS
2
of low level, and an output buffer unit
9
for outputting one of the output signals OUT
1
and OUT
2
from the first and second S/H units
3
and
6
in response to the first and second enable signals ENS
1
and ENS
2
.
As shown in
FIG. 2
, the output buffer unit
9
includes a first transistor Q
1
for switching the output signal OUT
1
of the first S/H unit
3
in response to the first enable signal ENS
1
output from the third level shift unit
7
, a second transistor Q
2
for switching the output signal OUT
2
of the second S/H unit
6
in response to the second enable signal ENS
2
output from the fourth level shift unit
8
, and third and fourth transistors Q
3
and Q
4
for respectively amplifying the signals output from the first and second transistors Q
1
and Q
2
at a predetermined gain.
The operation of the conventional circuit
50
for driving a source of a TFT-LCD will be described below.
The digital picture data of 4 bits, indicative of gray levels, are converted to predetermined levels V
SS2
−V
DD2
by the first level shift unit
1
, the first D/A converter
2
and the first S/H unit
3
to generate analog signals of positive (+) polarity. The digital picture data of 4 bits, indicative of gray levels, are converted to predetermined levels V
SS1
−V
DD1
by the second level shift unit
4
, the second D/A converter
5
and the second S/H unit
6
to generate analog signals of negative (−) polarity.
Externally applied polarity (+,−) signals are converted to predetermined levels V
SS2
−V
DD2
and V
SS1
−V
DD1
by the third and fourth level shift units
7
and
8
to generate and output the first and second enable signals ENS
1
, ENS
2
to the output buffer unit
9
. The output buffer unit
9
selects one of the output signals OUT
1
and OUT
2
from the first and second S/H units
3
and
6
in response to the first and second enable signals ENS
1
, ENS
2
, and applies the selected signal to a TFT-LCD data line.
In the conventional circuit
50
, circuits for processing positive (+) polarity picture signals and negative (−) polarity picture signals are separately provided. Each of these circuits has low voltage devices with the voltage conversion width of the circuit reduced to 5V or less. In addition, a shield transistor is formed at the output terminal circuit to prevent the generation of high voltage signals between the gate and drain of the respective transistor constituting the output terminal circuit or between the source and the drain of the same.
Such a conventional driving circuit for driving a source of a TFT-LCD has the following problems.
In processing picture signals of one channel, since positive (+) polarity processors and negative (−) polarity processors are separately provided, the size of the driving circuit becomes large.
Furthermore, when the output buffer unit switches from a positive (+) polarity signal to a negative (−) polarity signal, a high voltage signal is instantly applied between the source and drain of the fourth transistor Q
4
. Further, when the output buffer unit switches from a negative (−) polarity signal to a positive (+) polarity signal, a high voltage signal is instantly applied between the source and drain of the third transistor Q
3
. These high voltage signals deteriorate the reliability of the conventional driving circuit.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a circuit for driving a TFT-LCD that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a circuit for driving a TFT-LCD, which simplifies circuit configuration and can be realized by a typical CMOS process.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a device for driving a TFT-LCD according to the present invention includes a mixer for temporarily storing digital picture signals of a plurality of channels and outputting the digital picture signals according to a predetermined order of polarity based on polarity control data, a latch unit for latching the digital picture signals output from the mixer based on predetermined pulse signals, a digital-to-analog (D/A) conversion unit for converting the digital picture signals output from the latch unit based on predetermined reference voltage signals, and a storage unit for adding a predetermined value to an output signal of the D/A conversion unit when processing positive polarity signals, and a switching unit generating first and second polarity signals in a predetermined order based on output signals of the storage unit.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5510748 (1996-04-01), Erhart et al.
patent: 5578957 (1996-11-01), Erhart et al.
patent: 5604510 (1997-02-01), Blanchard
patent: 5625373 (1997-04-01), Johnson
patent: 5812104 (1998-09-01), Kapoor et al.
patent: 6008801 (1999-12-01), Jeong
patent: 6049321 (2000-04-01), Sasaki
patent: 6259425 (2001-07-01), Shimizu
Birch & Stewart Kolasch & Birch, LLP
Lao Lun-Yi
LG Semicon Co. Ltd.
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