Device and method for decoding HDTV video

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

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Details

348390, 348402, 348403, 348407, H04N 718

Patent

active

061047538

ABSTRACT:
HDTV video decoder circuit is disclosed, which has an 1/4 size frame memory for a progressive scanned or interlace scanned video and yet can conduct IDCT and motion compensation to fit to the reduced frame memory size, which, in comparison to a conventional MPEG-2 video decoder which uses a 4.times.4 IDCT that requires 1/4 frame memory in encoding an interlace scanned image into frame picture only to lose field information of the image resulting in a significant damage to the picture quality, facilitates to maintain the field information as it was resulting in an improvement in the picture quality.

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