Device and method for decoding an address word into...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S230050

Reexamination Certificate

active

06873567

ABSTRACT:
A method and a device for decoding an address word into word-line signals. A plurality of address lines feed the address word into a plurality of decoding blocks each associated to a particular address in the address space formed by the address word for generating a respective word-line signals, whereby each of the decoding blocks is connected to the plurality of address lines. At least one decoding block associated to a predetermined address in the address space formed by the address word is omitted, so that none of the generated word lines is switched to the active state, whenever the predetermined address word is inputted over the plurality of address lines.

REFERENCES:
patent: 4558433 (1985-12-01), Bernstein
patent: 5295115 (1994-03-01), Furuya et al.
patent: 5502683 (1996-03-01), Marchioro
patent: 5677883 (1997-10-01), Miwa
patent: 6700822 (2004-03-01), Wang

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