Device and method for correcting the duty cycle of a clock...

Details Device and method for correcting the duty cycle of a clock... Device and method for correcting the duty cycle of a clock...

2005-09-13

2005-09-13

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

Reexamination Certificate

active

06943604

ABSTRACT:
A device for correcting the duty cycle of a clock signal with a duty cycle modifying device which receives a clock signal and a complementary clock signal, which comprises a delay device for both clock signals, and which is adapted to generate a clock signal and a complementary clock signal with corrected duty cycle. The invention also relates to a corresponding method for correcting the duty cycle of a clock signal and may preferably be used to correct the duty cycle of the system clock input in a DDR-SDRAM device in order that an ideal duty cycle of 50 percent is achieved in the memory chip during the processing thereof to a data strobe. As compared to previous similar devices and methods, the invention thus enables, with DDR-SDRAM devices, a more precise reading out of the data from the devices to the system associated with the devices.

REFERENCES:
patent: 5120990 (1992-06-01), Koker
patent: 5757218 (1998-05-01), Blum
patent: 5777567 (1998-07-01), Murata et al.
patent: 6181178 (2001-01-01), Choi
patent: 6448828 (2002-09-01), Stark et al.
patent: 6525581 (2003-02-01), Choi
patent: 6654900 (2003-11-01), Cave

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