Device and high speed receiver including such a device

Details Device and high speed receiver including such a device Device and high speed receiver including such a device

2005-08-23

2005-08-23

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C330S009000

Reexamination Certificate

active

06933763

ABSTRACT:
The present invention is related to a device comprising, between a differential pair of inputs, a differential pre-amplifier (HPA1, HPA2), an offset-reducing block (ORB) cascaded with said differential pre-amplifier (HPA1, HPA2) and arranged for reducing the offset generated by said differential pre-amplifier, and a buffering block (BB) in series with said offset-reducing block (ORB) and arranged for amplifying and buffering the output voltage of said offset-reducing block.

REFERENCES:
patent: 5154066 (1992-10-01), Choi
patent: 6288604 (2001-09-01), Shih et al.
patent: 2002/0109075 (2002-08-01), Ono
patent: 1 067 691 (2001-01-01), None

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