Semiconductor device manufacturing: process – With measuring or testing
Patent
1997-12-11
1999-10-26
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
With measuring or testing
438 15, 438 17, 257 48, 29593, H01L 2934
Patent
active
059727250
ABSTRACT:
A method of precisely measuring electrical parameters in integrated circuits in a face down semiconductor device in which a portion of the semiconductor substrate is removed from the semiconductor device and an SEM microprobe is directed onto selected regions of the surface exposed by the removal of the semiconductor substrate. The microprobe is directed to selected regions of the exposed surface by a computer generated mapping system. One of the selected regions that the microprobe is directed to is a region of the exposed surface overlying a depletion region associated with a drain of a transistor in the semiconductor device. The voltage variation on the exposed surface caused by the expansion and shrinking of the depletion region is measured by the microprobe. Another region that the microprobe is directed to is a region of the exposed surface overlying an insulator and the microprobe detects the voltage of a conducting electrode under the insulator is measured via capacitive coupling. A third region that the microprobe is directed to is a region overlying a reverse-biased junction in the semiconductor device and a change in voltage of the reverse-biased junction is determined by measuring the voltage variation of the depletion region associated with the reverse-biased junction.
REFERENCES:
patent: 3969670 (1976-07-01), Wu
patent: 4109029 (1978-08-01), Ozdemir et al.
patent: 4296372 (1981-10-01), Feuerbaum
patent: 4453127 (1984-06-01), Schick
patent: 5097204 (1992-03-01), Yoshizawa et al.
patent: 5159752 (1992-11-01), Mahant-Shetti et al.
patent: 5406116 (1995-04-01), Wills et al.
patent: 5817533 (1998-10-01), Sen et al.
Gilfeather Glen
Wollesen Donald L.
Advanced Micro Devices , Inc.
Dietrich Michael
Monin, Jr. Donald L.
Nelson H. Donald
LandOfFree
Device analysis for face down chip does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device analysis for face down chip, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device analysis for face down chip will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-763287