Deterministic timed bus access method

Details Deterministic timed bus access method Deterministic timed bus access method

1994-02-04

1995-07-18

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

34082508, H04L 12403

Patent

active

054348617

ABSTRACT:
An improved timed deterministic bus access method and system for a bidirectional linear bus, a unidirectional linear bus, a star and a tree type of bus structure. The method employs a master timing reference signal and discrete values of time delay at each node together with a cycle start signal to provide orderly deterministic access by a number of nodes to a shared bus structure. The master timing reference signal is generated by a polling node which can also transmit messages. The time delays in the nodes can correspond to their physical order from the polling node when this is located at one end. Alternatively values of timing delays can be chosen to make the physical location of the polling node of the other nodes unimportant. The method provides for prioritised access to the bus structure using a reservation hold.

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William Stallings Data and Computer Communications, '88, pp. 349-351.

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