Deterministic permutation algorithm

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365200, 371 2, 371 11, G06F 1100

Patent

active

044610017

ABSTRACT:
Swapping of bits between different words of a memory is accomplished by reference to data on bad bits in the memory. This data controls address inputs to each bit in a memory word so that any word with multiple uncorrectable data is changed to a correctable data word by placing one or more of the bad bits in the word into another word of the memory. The swapping is done by an exclusionary process which deselects certain combinations of addresses thereby limiting the selection process to other combinations. The process can involve categorizing of failures in accordance with type and performing algorithm operations which identify combinations of bit addresses that would result in combining the failures so that there are more errors in any memory word than would be correctable by the error correction code monitoring the memory.

REFERENCES:
patent: 3644902 (1972-02-01), Beausoleil
patent: 3781826 (1973-12-01), Beausoleil
patent: 3812336 (1974-05-01), Bossen et al.
patent: 3897626 (1975-08-01), Beausoleil

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