Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2007-07-10
2007-07-10
Dinh, Son (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S051000, C365S230060, C977S963000
Reexamination Certificate
active
10853907
ABSTRACT:
A method for constructing and addressing a nanoscale memory with known addresses and for tolerating defects which may arise during manufacture or device operational lifetime. During construction, nanoscale wires with addresses are stochastically assembled. During a programming phase, nanoscale wires are stochastically selected using their stochastic addresses through microscale inputs and a desired address code is associated with the selected nanoscale wires. Memory addresses are associated to the codes and then selected using the known codes during read/write operations from/to the memory.
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Dehon André
Naeimi Helia
California Institute of Technology
Dinh Son
Ladas & Parry LLP
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